Patents by Inventor Chung-Ting WANG

Chung-Ting WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180122749
    Abstract: A semiconductor wafer includes a substrate structure, a first insulation layer, a conductive layer and a second insulation layer. The substrate structure defines a via. The first insulation layer covers a surface of the substrate structure. The first insulation layer extends into the via, covers a lateral wall of the via and exposes a bottom surface at a bottom of the via. The conductive layer covers the first insulation layer and the bottom surface exposed by the first insulation layer. The second insulation layer covers the conductive layer. A warpage of the semiconductor wafer is less than 550 micrometers.
    Type: Application
    Filed: November 1, 2016
    Publication date: May 3, 2018
    Inventors: Ying-Chih LEE, Chin-Cheng KUO, Yung-Hui WANG, Wei-Hong LAI, Chung-Ting WANG, Hsiao-Yen LEE