Patents by Inventor Chung Tse
Chung Tse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12176282Abstract: A manufacturing method of a semiconductor package includes the following steps. A supporting layer is formed over a redistribution structure. A first planarization process is performed over the supporting layer. A lower dielectric layer is formed over the supporting layer, wherein the lower dielectric layer includes a concave exposing a device mounting region of the supporting layer. A first sacrificial layer is formed over the supporting layer, wherein the sacrificial layer filling the concave. A second planarization process is performed over the lower dielectric layer and the first sacrificial layer. A transition waveguide provided over the lower dielectric layer. The first sacrificial layer is removed. A semiconductor device is mounted over the device mounting region, wherein the semiconductor device includes a device waveguide is optically coupled to the transition waveguide.Type: GrantFiled: March 27, 2023Date of Patent: December 24, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Hsiu-Jen Lin, Ming-Che Ho, Yu-Hsiang Hu, Chewn-Pu Jou, Cheng-Tse Tang
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Patent number: 12148723Abstract: A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.Type: GrantFiled: December 7, 2022Date of Patent: November 19, 2024Assignee: United Microelectronics Corp.Inventors: Zhirui Sheng, Hui-Ling Chen, Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin, Chien En Hsu
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Publication number: 20240369759Abstract: Disclosed are semiconductor packages and manufacturing method of the semiconductor packages. In one embodiment, a semiconductor package includes a substrate, a first waveguide, a semiconductor die, and an adhesive layer. The first waveguide is disposed on the substrate. The semiconductor die is disposed on the substrate and includes a second waveguide aligned with the first waveguide. The adhesive layer is disposed between the first waveguide and the second waveguide.Type: ApplicationFiled: July 16, 2024Publication date: November 7, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Ming Weng, Hua-Kuei Lin, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Che-Hsiang Hsu, Chewn-Pu Jou, Cheng-Tse Tang
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Patent number: 12119238Abstract: A system and method for applying an underfill is provided. An embodiment comprises applying an underfill to a substrate and patterning the underfill. Once patterned other semiconductor devices, such as semiconductor dies or semiconductor packages may then be attached to the substrate through the underfill, with electrical connections from the other semiconductor devices extending into the pattern of the underfill.Type: GrantFiled: September 30, 2019Date of Patent: October 15, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Meng-Tse Chen, Hsiu-Jen Lin, Wei-Hung Lin, Kuei-Wei Huang, Ming-Da Cheng, Chung-Shi Liu
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Patent number: 12105323Abstract: Disclosed are semiconductor packages and manufacturing method of the semiconductor packages. In one embodiment, a semiconductor package includes a substrate, a first waveguide, a semiconductor die, and an adhesive layer. The first waveguide is disposed on the substrate. The semiconductor die is disposed on the substrate and includes a second waveguide aligned with the first waveguide. The adhesive layer is disposed between the first waveguide and the second waveguide.Type: GrantFiled: July 25, 2023Date of Patent: October 1, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Ming Weng, Hua-Kuei Lin, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Che-Hsiang Hsu, Chewn-Pu Jou, Cheng-Tse Tang
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Publication number: 20240138715Abstract: Various embodiments comprise systems, methods, architectures, mechanisms and apparatus providing a super-regenerative oscillator (SRO) integrated metamaterial (MTM) leaky wave antenna (LWA) architecture suitable for use in radio frequency (RF) detecting, ranging (e.g., RADAR), and sensing systems/applications, such as a noncontact multi-target vital sign detection system.Type: ApplicationFiled: October 26, 2023Publication date: May 2, 2024Applicant: Rutgers, The State University of New JerseyInventors: Chung-Tse Michael Wu, Yichao Yuan
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Publication number: 20240130637Abstract: System and method for sensing movement such as chest movement of each of a plurality of target test subjects by: transmitting, at each of N transmitting antennas (TXs) of a phased multiple-input multiple-output (phased-MIMO) radar, a common frequency modulated continuous wave (FMCW) signal in each of a plurality of time division multiplex (TDM) slots, each TDM slot having associated with it a respective weight selected in accordance with a transmit steering vector configured to cause a coherent summation of transmitted signal in a desired direction ?0 toward at least one target; receiving target-reflected energy associated with the transmitted FMCW signals at a virtual array formed by stacking signal from P TDM slots received via M receiving antennas (RXs) of the phased-MIMO radar; and processing an output of the virtual array to extract therefrom signal received from the desired direction ?0 to determine thereby target movement in the desired direction ?0.Type: ApplicationFiled: October 18, 2023Publication date: April 25, 2024Applicant: Rutgers, The State University of New JerseyInventors: Athina Petropulu, Yingying Chen, Zhaoyi Xu, Chung-Tse Michael Wu, Cong Shi, Tianfang Zhang, Shuping Li, Yichao Yuan
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Publication number: 20230361585Abstract: Embodiments provide a wall-mountable storage system. The wall-mountable storage system includes a first storage structure configured to mount to a wall, the first storage structure including a modular accessory interface and an alignment interface. The wall-mountable storage system also includes a modular accessory configured to engage with and be supported by the modular accessory interface. The first storage structure is configured to receive power from an external power source and output power to the modular accessory.Type: ApplicationFiled: May 2, 2023Publication date: November 9, 2023Inventors: Connor S. Irwin, Brianna E. Williams, Gabriel J. Sandoval, Tyler H. Knight, Raquel M. Rabago, Benjamin G. Politte, Ho Quynh Chau Duong, Jeffrey Groves, Frederick W. Bryan, J. Luke Jenkins, Nicolas J. Hanks, Kwok Ting Mok, Ying Chung Tse, Man Kit Mok
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Patent number: 11706933Abstract: A semiconductor memory device includes a substrate, a dielectric layer on the substrate, and a contact plug in the dielectric layer. An upper portion of the contact plug protrudes from a top surface of the dielectric layer. The upper portion of the contact plug acts as a first electrode. A buffer layer is disposed on the dielectric layer and beside the upper portion of the contact plug. A resistive-switching layer is disposed beside the buffer layer. A second electrode is disposed beside the resistive-switching layer.Type: GrantFiled: April 7, 2021Date of Patent: July 18, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Wen-Hsin Hsu, Ko-Chi Chen, Tzu-Yun Chang, Chung-Tse Chen
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Publication number: 20230017588Abstract: A local wearable brain wave cap device for detection is provided to simultaneously detect brainwave and heart rate variability data of a subject and includes a brain wave detection cap, at least one ear electrode and a transmission unit. The brain wave detection cap includes a wearable device and a plurality of electrode units. The wearable device is suitable for arranging the plurality of electrode units on brain wave positions corresponding to head of a subject. Each of the plurality of electrode units includes an accelerator, a storage unit, an input/output unit and a primary amplifier for detecting a brain wave.Type: ApplicationFiled: October 6, 2021Publication date: January 19, 2023Inventors: Shu-Chun Kuan, Jason Chun-Cheng Lin, Chung-Tse Shen
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Patent number: 11508783Abstract: A method for fabricating memory device is provided. The method includes forming a transistor on a substrate. Further, a contact structure is formed on a source/drain region of the transistor. A conductive layer is formed on the contact structure. Four memory structures are formed on the conductive layer to form a quadrilateral structure.Type: GrantFiled: April 20, 2021Date of Patent: November 22, 2022Assignee: UNITED MIICROELECTRONICS CORP.Inventors: Chung-Tse Chen, Ko-Chi Chen, Tzu-Yun Chang
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Publication number: 20220361801Abstract: A system for providing real-time biological feedback training through remote transmission is provided and includes a local brain wave collection device, a docking device, and a dongle. The local brain wave collection device is used to detect a brain wave and a heart rate variability data of a subject. The docking device communicates with the local brain wave collection device remotely to connect a remote cloud system to compare the brain wave and the heart rate variability data with a brain wave database to generate a comparison result, and according to the comparison result, the system provides the subject a feedback training interface.Type: ApplicationFiled: October 6, 2021Publication date: November 17, 2022Inventors: Shu-Chun Kuan, Jason Chun-Cheng Lin, Chung-Tse Shen
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Publication number: 20220293679Abstract: A semiconductor memory device includes a substrate, a dielectric layer on the substrate, and a contact plug in the dielectric layer. An upper portion of the contact plug protrudes from a top surface of the dielectric layer. The upper portion of the contact plug acts as a first electrode. A buffer layer is disposed on the dielectric layer and beside the upper portion of the contact plug. A resistive-switching layer is disposed beside the buffer layer. A second electrode is disposed beside the resistive-switching layer.Type: ApplicationFiled: April 7, 2021Publication date: September 15, 2022Inventors: Wen-Hsin Hsu, Ko-Chi Chen, Tzu-Yun Chang, Chung-Tse Chen
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Publication number: 20210242282Abstract: A method for fabricating memory device is provided. The method includes forming a transistor on a substrate. Further, a contact structure is formed on a source/drain region of the transistor. A conductive layer is formed on the contact structure. Four memory structures are formed on the conductive layer to form a quadrilateral structure.Type: ApplicationFiled: April 20, 2021Publication date: August 5, 2021Applicant: United Microelectronics Corp.Inventors: Chung-Tse Chen, Ko-Chi Chen, Tzu-Yun Chang
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Patent number: 11024672Abstract: A structure of memory device is provided. The structure of memory device includes a transistor formed on a substrate. A contact structure is disposed on a source/drain region of the transistor. A conductive layer is disposed on the contact structure. Four memory structures is disposed on the conductive layer to form a quadrilateral structure.Type: GrantFiled: May 21, 2019Date of Patent: June 1, 2021Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chung-Tse Chen, Ko-Chi Chen, Tzu-Yun Chang
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Publication number: 20200328255Abstract: A structure of memory device is provided. The structure of memory device includes a transistor formed on a substrate. A contact structure is disposed on a source/drain region of the transistor. A conductive layer is disposed on the contact structure. Four memory structures is disposed on the conductive layer to form a quadrilateral structure.Type: ApplicationFiled: May 21, 2019Publication date: October 15, 2020Applicant: United Microelectronics Corp.Inventors: Chung-Tse Chen, Ko-Chi Chen, Tzu-Yun Chang
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Patent number: 10119991Abstract: A vertical probe device includes a lower die having engaging holes and needle holes, a positioning film having limiting holes and needle holes, probe needles inserted through the needle holes, and supporters having at least an upper stopping surface and at least a lower stopping surface for moveably limiting the positioning film therebetween. Each supporter has a head, a neck passing through the limiting hole and having a length longer than the thickness of the positioning film, a body, and a tail inserted into the engaging hole, which are connected in order, and at least one of the upper and lower stopping surfaces. The supporters can prevent the positioning film from being lifted and flipped over and enables the positioning film to move so that the probe needles are reliable.Type: GrantFiled: March 25, 2015Date of Patent: November 6, 2018Assignee: MPI CORPORATIONInventors: Tsung-Yi Chen, Horng-Kuang Fan, Ching-Hung Yang, Chung-Tse Lee, Chia-Yuan Kuo, Tien-Chia Li, Ting-Ju Wu, Shang-Jung Hsieh
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Publication number: 20180074180Abstract: A system (100) for locating an object (114) includes a signal source (102) that generates a wideband signal (104) that includes a continuously variable frequency from a first frequency to a second frequency, a microwave metamaterial leaky wave antenna (106) that receives the wideband signal as an input and maps the wideband signal from the first frequency to the second frequency as electromagnetic radiation that increases as a function of an azimuthal direction (108,110,112), the microwave metamaterial leaky wave antenna (106) positionable to face toward an object that is within its field-of-view FOV, wherein the transceiver assembly is positioned to receive the electromagnetic radiation that is reflected from the object and convert the reflected electromagnetic radiation to a reflected electrical signal, and an analyzer (118) configured to identify a main beam frequency of the reflected electrical signal and determine an azimuthal angle (108,110,112) and distance to the object based on the main beam frequencType: ApplicationFiled: February 26, 2016Publication date: March 15, 2018Inventor: Michael Chung-Tse Wu
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Patent number: 9648757Abstract: A method of manufacturing a space transformer includes providing a carrier substrate made for a chip package, forming an insulated layer disposed on the carrier substrate, and forming a conductive block. The carrier substrate is formed with elongated first and second wires. The first wire has an elongated contact which is longer than the width of the first wire. The insulated layer is formed with a hole corresponding in position to the elongated contact. The conductive block is formed with an elongated connecting column located in the hole and connected with the elongated contact, and a cylindrical contact pad exposed at the outside of the insulated layer, larger-sized than the elongated connecting column is connected with the elongated connecting column. As a result, the cylindrical contact pad has sufficient area and structural strength for contact with a probe needle.Type: GrantFiled: October 22, 2014Date of Patent: May 9, 2017Assignee: MPI CORPORATIONInventors: Chung-Tse Lee, Chien-Chou Wu, Tsung-Yi Chen
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Patent number: 9643271Abstract: A method for making a support structure for a probing device includes a step of providing a substrate having first internal conductive lines, a carrier having second internal conductive lines and a thickness less than 2 mm for packaging an integrated circuit chip, solder balls, and photoresist support blocks made by lithography in a way that the solder balls and the photoresist support blocks are disposed between the substrate and the carrier, the photoresist support blocks separately arranged from each other, and at least one of the photoresist support blocks is disposed between two adjacent solder balls. The method further includes a step of electrically connecting the first internal conductive lines with the second internal conductive lines respectively by soldering the carrier and the substrate with the solder balls by reflow soldering.Type: GrantFiled: January 20, 2015Date of Patent: May 9, 2017Assignee: MPI CorporationInventors: Kun-Han Hsieh, Huo-Kang Hsu, Kuan-Chun Chou, Tsung-Yi Chen, Chung-Tse Lee