Abstract: An electronic device of an embodiment of the disclosure includes a first substrate, a second substrate, and a driving layer. The first substrate and the second substrate are disposed opposite to each other, and the driving layer is disposed between the first substrate and the second substrate. The driving layer includes a scan line and a data line. The scan line is disposed on the first substrate and includes a first scan line segment. The first scan line segment has an opening and includes a first branch and a second branch. The first branch and the second branch are located on two opposite sides of the opening and are electrically connected in parallel with each other. The data line is disposed on the first substrate and intersects with the scan line. The electronic device of the embodiment of the disclosure may exhibit ideal display effect.

Abstract: In a method of manufacturing a semiconductor device, in an EUV scanner, an EUV lithography operation using an EUV mask is performed on a photo resist layer formed over a semiconductor substrate. After the EUV lithography operation, the EUV mask is unloaded from a mask stage of the EUV scanner. The EUV mask is placed under a reduced pressure below an atmospheric pressure. The EUV mask is heated under the reduced pressure at a first temperature in a range from 100° C. to 350 C°. After the heating, the EUV mask is stored in a mask stocker.

Abstract: A method of using non-contrast magnetic resonance angiography (NC-MRA) to generate pelvic veins images and measure rate of blood flow includes the ordered steps of: (a) performing a non-contrast magnetic resonance scan in cooperation with an electrocardiogram monitor and a respiration monitor; (b) obtaining two-dimensional images of kidney veins, lower cavity veins, common iliac veins, and external iliac veins using use balanced turbo field echo wave sequence; (c) obtaining three-dimensional images of common cardinal veins of the abdominal cavity using fast spin-echo short tau inversion recovery wave sequence and using sample signals from the electrocardiogram monitor during myocardial contractility; and (d) using quantification phase-contrast analysis to measure blood flowing through the transverse sections of the veins in a two-dimensional scan.

Abstract: A semiconductor device includes a substrate having a first conductivity type and an epitaxial layer disposed on the substrate. A first trench and a second trench are disposed in the epitaxial layer. A first body region and a second body region both having a second conductivity type are disposed in the epitaxial layer, and located on two sides of the first trench, respectively. A first source region and a second source region both having the first conductivity type are disposed on the first body region and the second body region, respectively. A first electrode is disposed in the first trench. A source contact structure includes a first portion disposed in the first trench and is electrically connected to the first source region and the second source region. A first gate is disposed in the second trench.

Abstract: A moving device, applied in a nucleic acid extraction system and cooperated with a plurality of microtube components, the moving device includes: a workbench; a moving component, disposed on the workbench; a control element, disposed on the moving component and electrically connected to the moving component; a first motor, disposed on the moving component and electrically connected to the control element; a first rotating rod, connected to the first motor; a second motor, disposed on the moving component and electrically connected to the control element; a second rotating rod, connected to the second motor; and a telescopic component, disposed on the moving component corresponding to the first rotating rod and the second rotating rod, electrically connected to the control element, and movable between a first position and a second position.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first stack structure and a second stack structure in a first area over a substrate, wherein each of the stack structures includes semiconductor layers separated and stacked up; depositing a first interfacial layer around each of the semiconductor layers of the stack structures; depositing a gate dielectric layer around the first interfacial layer; forming a dipole oxide layer around the gate dielectric layer; removing the dipole oxide layer around the gate dielectric layer of the second stack structure; performing an annealing process to form a dipole gate dielectric layer for the first stack structure and a non-dipole gate dielectric layer for the second stack structure; and depositing a first gate electrode around the dipole gate dielectric layer of the first stack structure and the non-dipole gate dielectric layer of the second stack structure.

Abstract: A method for adjusting application settings is provided. The method includes using an application setting module to receive at least one performance target from an application running on an electronic device. The method further includes using the application setting module to record at least one performance indicator of the application while the application is running, wherein the performance indicator corresponds to the performance target. The method further includes using the application setting module to estimate the estimated time that the temperature of the electronic device sustains less than the defense temperature. The method further includes using the application setting module to determine the score according to the performance indicator and the estimated time, wherein the score indicates to the application that it should raise, lower, or keep a current setting.

Abstract: An electronic device includes a processor arranged to execute an application, a platform and a middleware. The application is configured to execute operations of: providing at least one acceptable quality and at least one priority of the at least one profile parameter. The platform is configured to execute an operation of: providing platform information in response to a demand request. The middleware is configured to execute operations of: receiving the at least one acceptable quality and the at least one priority from the application; receiving the platform information from the platform; performing a self-adaptive algorithm according to the platform information to generate a result; adjusting the at least one profile parameter according to the result, the at least one acceptable quality and the at least one priority; and transmitting an adjustment notification to the platform, after adjusting the at least one profile parameter.

Abstract: A method for controlling a plurality of autonomous robots for performing environment maintenance operations includes: generating a setup command that indicates a selected location, a plurality of selected robots, an available time slot, and a distribution mode signal that indicates whether the selected robots are to be controlled based on the available time slot or an inputted priority section; and generating a plurality of sub-routes based on different parameters, depending on the distribution mode signal. The sub-routes are generated to be connected into an unbroken trail. Then, the sub-routes are transmitted to the selected robots, respectively, so as to control each of the selected robots to move along the respective one of the sub-routes.

Abstract: A heat dissipation device includes a vapor chamber for contacting a heat source; at least one heat pipe having a first end and a second end connected to the vapor chamber; at least one partition disposed inside the heat pipe to partition the inside of the heat pipe into a first channel and a second channel isolated from each other; and a heat dissipation fin set disposed on the vapor chamber and partially covers the heat pipe. The vapor chamber is filled with a liquid working medium that absorbs the heat of the heat source and then gasifies into a gaseous working medium. The gaseous working medium moves into the first channel and the second channel to be condensed by the heat dissipation fin set, so the gaseous working medium is liquefied into the liquid working medium, and then the liquid working medium flows back into the vapor chamber.

Abstract: The present disclosure provides a wireless communication system including a first host computer, a communication dongle, a second host computer and an input device. The communication dongle is connected to the first host computer via a USB interface, connected to the second host computer via a Bluetooth interface, and connected to the input device via a RF interface. The first host computer has first application software for intercepting the operating signal(s) of the input device and transferring, via the communication dongle, to the second host computer to be executed thereby. The first application software also controls the first host computer to ignore the operating signal(s) during the operating signal(s) is being transferred to the second host computer.

Abstract: Methods of forming decoupling capacitors in interconnect structures formed on backsides of semiconductor devices and semiconductor devices including the same are disclosed. In an embodiment, a device includes a device layer including a first transistor; a first interconnect structure on a front-side of the device layer; a second interconnect structure on a backside of the device layer, the second interconnect structure including a first dielectric layer on the backside of the device layer; a contact extending through the first dielectric layer to a source/drain region of the first transistor; a first conductive layer including a first conductive line electrically connected to the source/drain region of the first transistor through the contact; and a second dielectric layer adjacent the first conductive line, the second dielectric layer including a material having a k-value greater than 7.0, a first decoupling capacitor including the first conductive line and the second dielectric layer.

Abstract: A Schottky diode includes a substrate with an epitaxy layer on which a cathode region and an anode region are defined. A cathode structure and an anode structure are formed in the cathode region and the anode region respectively and horizontally separated by a distance. The anode structure includes a plurality of p-type doped regions diffused from the epitaxy layer toward the substrate, with an interval is formed between adjacent two p-type doped regions. A backside metal film and a backside protection layer are sequentially formed on a back surface of the substrate. Since the manufacturing of the Schottky diode does not involve wire bonding and molding processes, the overall thickness of the Schottky diode is reduced and heat dissipation is improved. With the backside metal film on the back side of the substrate, an equivalent resistance and a forward voltage of the Schottky diode can be reduced.

Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.

Abstract: A digital compute-in-memory (DCIM) macro includes a memory cell array and an arithmetic logic unit (ALU). The memory cell array stores weight data of a neural network. The ALU receives parallel bits of a same input channel in an activation input, and generates a convolution computation output of the parallel bits and target weight data in the memory cell array.

Abstract: A digital compute-in-memory (DCIM) system includes a first DCIM macro. The first DCIM macro includes a first memory cell array and a first arithmetic logic unit (ALU). The first memory cell array has N rows that are configured to store weight data of a neural network in a single weight data download session, wherein N is a positive integer not smaller than two. The first ALU is configured to receive a first activation input, and perform convolution operations upon the first activation input and a single row of weight data selected from the N rows of the first memory cell array to generate first convolution outputs.

Abstract: A bonded semiconductor structure includes a first device wafer and a second device wafer. The first device includes a first dielectric layer, a first bonding pad disposed in the first dielectric layer, and a first bonding layer on the first dielectric layer. The second device wafer includes a second dielectric layer, a second bonding layer on the second dielectric layer, and a second bonding pad disposed in the second dielectric layer and extending through the second bonding layer and at least a portion of the first bonding layer. A conductive bonding interface between the first bonding pad and the second bonding pad and a dielectric bonding interface between the first bonding layer and the second bonding layer include a step-height in a direction perpendicular to the dielectric bonding interface and the conductive bonding interface. A height of the step-height is smaller than a thickness of the first bonding layer.

Abstract: A bonded semiconductor structure includes a first device wafer and a second device wafer. The first device includes a first dielectric layer, a first bonding pad disposed in the first dielectric layer, and a first bonding layer on the first dielectric layer. The second device wafer includes a second dielectric layer, a second bonding layer on the second dielectric layer, and a second bonding pad disposed in the second dielectric layer and extending through the second bonding layer and at least a portion of the first bonding layer. A conductive bonding interface between the first bonding pad and the second bonding pad and a dielectric bonding interface between the first bonding layer and the second bonding layer include a step-height in a direction perpendicular to the dielectric bonding interface and the conductive bonding interface.

Abstract: A magnetic memory including a substrate, a spin-orbit torque (SOT) layer, a magnetic tunnel junction (MTJ) stack, a first protection layer, and a second protection layer is provided. The SOT layer is located over the substrate. The MTJ stack is located on the SOT layer. The first protection layer and the second protection layer are located on the sidewall of the MTJ stack. The first protection layer is located between the second protection layer and the MTJ stack. There is a notch between the second protection layer and the SOT layer.

Abstract: An electronic device is provided. The electronic device includes a first substrate; a second substrate disposed opposite to the first substrate; a liquid crystal layer disposed between the first substrate and the second substrate; a plurality of first electrodes disposed between the first substrate and the liquid crystal layer; a plurality of second electrodes disposed between the second substrate and the liquid crystal layer; a first signal line disposed between the first substrate and the liquid crystal layer, and electrically connected to one of the plurality of first electrodes; and a second signal line disposed between the second substrate and the liquid crystal layer, and electrically connected to one of the plurality of second electrodes. The first signal line and the second signal line include a blackened metal.