Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.

Abstract: A solar cell includes a crystalline silicon substrate, a plurality of P-type semiconductor material layers, a plurality of N-type semiconductor material layers, a plurality of first and second anode electric collection portions, at least one first electrode bus portion, a plurality of first and second cathode electric collection portions, at least one second electrode bus portion, and at least one third electrode bus portion. The first anode electric collection portions, the first electrode bus portion, the first cathode electric collection portions, the second electrode bus portion, the second anode electric collection portions, the second electrode bus portion, the second cathode electric collection portions, and the third electrode bus portion are arranged to form plural cell sub-units, such that an output voltage of the solar cell can be increased.

Abstract: A solar cell includes a crystalline semiconductor substrate; a first crystalline semiconductor layer; an amorphous semiconductor layer; a first metal electrode layer and a second metal electrode layer. The crystalline semiconductor substrate has a first surface and a second surface, and the crystalline semiconductor substrate has a first doped type. The first crystalline semiconductor layer is disposed on the first surface of the crystalline semiconductor substrate, where the first crystalline semiconductor layer has a second doped type contrary to the first doped type. The amorphous semiconductor layer is disposed on the first crystalline semiconductor layer, and the amorphous semiconductor layer has the second doped type. The first metal electrode layer is disposed on the amorphous semiconductor layer. The second metal electrode layer is disposed on the second surface of the crystalline semiconductor substrate.