Patents by Inventor Chung-Wen Huang
Chung-Wen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11978410Abstract: A method of backlight control for a display panel is provided. The display panel is configured to display with a variable refresh rate in a plurality of frame periods each having a fixed period and a variable period. The method includes steps of: generating a first backlight control signal in the fixed period of a frame period; determining whether a liquid crystal (LC) transition time corresponding to the frame period ends before an end time of the variable period of the frame period; generating a second backlight control signal in the variable period of the frame period when the LC transition time ends before the end time of the variable period of the frame period; and generating a compensation backlight control signal in a next frame period according to a backlight duty cycle of the frame period.Type: GrantFiled: June 23, 2022Date of Patent: May 7, 2024Assignee: NOVATEK Microelectronics Corp.Inventors: Po-Hsiang Huang, Chung-Wen Wu, Jiun-Yi Lin, Wen-Chi Lin
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Patent number: 11978751Abstract: An electrode controls transmittance of a blocking layer over a photodiode of a pixel sensor (e.g., a photodiode of a small pixel detector) by changing oxidation of a metal material included in the blocking layer. By using the electrode to adjust transmittance of the blocking layer, pixel sensors for different uses and/or products may be produced using a single manufacturing process. As a result, power and processing resources are conserved that otherwise would have been expended in switching manufacturing processes. Additionally, production time is decreased (e.g., by eliminating downtime that would otherwise have been used to reconfigure fabrication machines.Type: GrantFiled: January 10, 2023Date of Patent: May 7, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Wen Huang, Chung-Liang Cheng, Ping-Hao Lin, Kuo-Cheng Lee
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Publication number: 20240139734Abstract: A biological particle enrichment apparatus and a pico-droplet generator thereof are provided. The pico-droplet generator includes a container, a hollow needle connected to the container, a first piezoelectric member disposed on the container, and a second piezoelectric member disposed on the hollow needle. The container can receive a liquid specimen having biological particles. The hollow needle and the container are fluid communicated with each other, and an inner diameter of the container is within a range from 5 times to 30 times of an inner diameter of the hollow needle. The first piezoelectric member is annularly disposed on a surrounding lateral side of the container, and enables the biological particles in the container to move along a direction away from the surrounding lateral side by vibrating the container. The second piezoelectric member can squeeze the hollow needle, so that the liquid specimen flows outwardly to form a pico-droplet.Type: ApplicationFiled: April 10, 2023Publication date: May 2, 2024Inventors: Chung-Er Huang, Sheng-Wen Chen, Hsin-Cheng Ho, GUANG-CI YE
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Publication number: 20240142459Abstract: A biological particle analysis method is provided and includes the following steps: fluorescence staining a liquid specimen through a fluorescence staining process so as to enable a target biological particle in the liquid specimen to becomes a fluorescence; accommodating the liquid specimen into a pico-droplet generator and using a camera device to take a real-time image of the liquid specimen; using the pico-droplet generator to output a target pico-droplet having the target biological particle onto a biochip according to the real-time image; removing the fluorescent color of the target biological particle in the target pico-droplet through a washing process; and fluorescence staining the target biological particle captured by the biochip at multiple times through the fluorescence staining process and the washing process, so as to obtain a plurality of fluorescence images respectively corresponding to multiple kinds of biological characterization expressions.Type: ApplicationFiled: April 10, 2023Publication date: May 2, 2024Inventors: Chung-Er Huang, Sheng-Wen Chen, Hsin-Cheng Ho, GUANG-CI YE
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Patent number: 11948954Abstract: An electrode controls transmittance of a blocking layer over a photodiode of a pixel sensor (e.g., a photodiode of a small pixel detector) by changing oxidation of a metal material included in the blocking layer. By using the electrode to adjust transmittance of the blocking layer, pixel sensors for different uses and/or products may be produced using a single manufacturing process. As a result, power and processing resources are conserved that otherwise would have been expended in switching manufacturing processes. Additionally, production time is decreased (e.g., by eliminating downtime that would otherwise have been used to reconfigure fabrication machines.Type: GrantFiled: January 10, 2023Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Wen Huang, Chung-Liang Cheng, Ping-Hao Lin, Kuo-Cheng Lee
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Patent number: 11935722Abstract: This disclosure is directed to solutions of detecting and classifying wafer defects using machine learning techniques. The solutions take only one coarse resolution digital microscope image of a target wafer, and use machine learning techniques to process the coarse SEM image to review and classify a defect on the target wafer. Because only one coarse SEM image of the wafer is needed, the defect review and classification throughput and efficiency are improved. Further, the techniques are not distractive and may be integrated with other defect detecting and classification techniques.Type: GrantFiled: July 21, 2022Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-Pin Chou, Sheng-Wen Huang, Jun-Xiu Liu
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Patent number: 11115595Abstract: An electronic device is provided. The electronic device includes a controller, configured to receive an input image signal captured by a camera device, perform a codec process on the input image signal to generate a processed file. The controller is further configured to perform privacy detection on the input image signal or the processed file. In response to the input image signal or the processed file being detected to include privacy information, the controller is further configured to encrypt the processed file to generate an encrypted file.Type: GrantFiled: September 3, 2019Date of Patent: September 7, 2021Assignee: MEDIATEK INC.Inventors: Chung-Wen Huang, Hung-Jen Chen
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Publication number: 20210067699Abstract: An electronic device is provided. The electronic device includes a controller, configured to receive an input image signal captured by a camera device, perform a codec process on the input image signal to generate a processed file. The controller is further configured to perform privacy detection on the input image signal or the processed file. In response to the input image signal or the processed file being detected to include privacy information, the controller is further configured to encrypt the processed file to generate an encrypted file.Type: ApplicationFiled: September 3, 2019Publication date: March 4, 2021Inventors: Chung-Wen HUANG, Hung-Jen CHEN
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Patent number: 8717903Abstract: A testing method and an apparatus applied to an IP phone system for testing an electronic device is provided. The electronic device has a true table and signal ports. The electronic device is connected to a power generating jig and an IP phone simulator via a cable. A power generated by the power generating jig is provided. A first value power command issued by the IP phone simulator is provided. Whether the electronic device is able to correctly control the signal ports in response to the first value power command and the true table is determined. A second value power command issued by the IP phone simulator is provided. Whether the electronic device is able to correctly control the signal ports in response to the second value power command and the true table is determined. If so, it is concluded that the electronic device passes the test.Type: GrantFiled: December 28, 2011Date of Patent: May 6, 2014Assignee: Inventec CorporationInventors: Chung-Wen Huang, Chen-Wu Hsieh
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Publication number: 20130297851Abstract: A peripheral device includes a first memory, a second memory, a first access controller, a second access controller and a main controller. When accessing data, first data is written to the first memory from the main controller while second data is read from the second memory to the main controller. Then the first data is written from the first memory to the second memory after writing the first data to the first memory and reading the second data from the second memory are completed.Type: ApplicationFiled: May 2, 2012Publication date: November 7, 2013Inventor: Chung-Wen Huang
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Publication number: 20130107720Abstract: A testing method and an apparatus applied to an IP phone system for testing an electronic device is provided. The electronic device has a true table and signal ports. The electronic device is connected to a power generating jig and an IP phone simulator via a cable. A power generated by the power generating jig is provided. A first value power command issued by the IP phone simulator is provided. Whether the electronic device is able to correctly control the signal ports in response to the first value power command and the true table is determined. A second value power command issued by the IP phone simulator is provided. Whether the electronic device is able to correctly control the signal ports in response to the second value power command and the true table is determined. If so, it is concluded that the electronic device passes the test.Type: ApplicationFiled: December 28, 2011Publication date: May 2, 2013Applicant: INVENTEC CORPORATIONInventors: Chung-Wen Huang, Chen-Wu Hsieh
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Patent number: 8158893Abstract: An EMI/ESD protection module is disposed between a first metal connecting member and a second metal connecting member. The EMI/ESD protection module includes a first conductive member, a second conductive member and a resilient member. The first conductive member is electrically connected to the first metal connecting member. The second conductive member is movably connected to the first conductive member and electrically connected to the second metal connecting member. The resilient member is disposed between the first and second conductive members.Type: GrantFiled: February 4, 2010Date of Patent: April 17, 2012Assignee: Transcend Information, Inc.Inventors: Chung-Won Shu, Chih-Heng Chiu, Din-Ji Tzou, Chung-Wen Huang
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Publication number: 20110162878Abstract: An EMI/ESD protection module is disposed between a first metal connecting member and a second metal connecting member. The EMI/ESD protection module includes a first conductive member, a second conductive member and a resilient member. The first conductive member is electrically connected to the first metal connecting member. The second conductive member is movably connected to the first conductive member and electrically connected to the second metal connecting member. The resilient member is disposed between the first and second conductive members.Type: ApplicationFiled: February 4, 2010Publication date: July 7, 2011Inventors: Chung-Won Shu, Chih-Heng Chiu, Din-Ji Tzou, Chung-Wen Huang
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Publication number: 20110157839Abstract: A filtering module includes a circuit board, a connector, a core and a plurality of coils. The connector and the core are disposed on the circuit board. The coils wind around the core and are electrically connected to the connector.Type: ApplicationFiled: January 27, 2010Publication date: June 30, 2011Inventors: Chung-Won Shu, Chih-Heng Chiu, Din-Ji Tzou, Chung-Wen Huang
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Patent number: 7779412Abstract: A system chip includes a plurality of processing elements for performing primary computations of a plurality of tasks, a plurality of non-processing elements for controlling flow of data associated with the tasks among the processing elements, and a main controller including a scheduler, a resource allocation module, and a power management module. The scheduler assigns the tasks on the processing and non-processing elements with reference to time parameters of the processing and non-processing elements. The resource allocation module controls operations of the processing and non-processing elements with reference to task assignments determined by the scheduler. The power management module performs dynamic voltage management upon the processing and non-processing elements according to the scheduled tasks.Type: GrantFiled: September 19, 2005Date of Patent: August 17, 2010Assignee: National Tsing Hua UniversityInventors: Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq-Kuen Lee
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Publication number: 20100084180Abstract: An electronic device includes a circuit board and a shielding member. The circuit board includes a pair of frames and a plurality of mounting holes disposed between the frames. The pair of frames surround at least one electronic component positioned within an area defined within the pair of frames. The shielding member is configured for shielding the electronic component from electromagnetic interference (EMI), and includes a top wall, a plurality of sidewalls, and a plurality of mounting portion extending from end portions of the sidewalls. The top wall and the sidewalls cooperatively bound a receiving space to receive the at least one electronic component. The mounting portions are received in the corresponding mounting holes to attach the shielding member to the circuit board.Type: ApplicationFiled: March 25, 2009Publication date: April 8, 2010Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: SHE-FEN CHIANG, CHUNG-WEN HUANG
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Patent number: 7539884Abstract: A method of power-gating instruction scheduling for leakage power reduction comprises receiving a program, generating a control-flow graph dividing the program into a plurality of blocks, analyzing utilization of power-gated components of a processor executing the program, generating the first power-gating instruction placement comprising power-off instructions and power-on instructions to shut down the inactive power-gated components, generating the second power-gating instruction placement by merging the power-off instructions as one compound power-off instruction and merging the power-on instructions as one compound power-on instruction, and inserting power-gating instructions into the program in accordance with the second power-gating instruction placement.Type: GrantFiled: July 27, 2006Date of Patent: May 26, 2009Assignee: Industrial Technology Research InstituteInventors: Yi-Ping You, Chung Wen Huang, Jeng Kuen Lee, Chi-Lung Wang, Kuo Yu Chuang
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Patent number: 7398410Abstract: A processor includes a plurality of execution units configured to execute instructions, a pre-decoder configured to sieve out a power-switching instruction from the instructions, and a power controller configured to control the status of the execution unit based on the power-switching instruction. The power controller includes an identification decoder configured to generate identifications respectively corresponding to the execution units from the power-switching instruction, and a power manager configured to switch the execution unit corresponding to the identification. Particularly, the power-switching instruction includes a power-on instruction and a power-off instruction. The processor further includes a plurality of reservation tables each configured to store the instruction to be executed by one of the execution units, and a turn-off signal is not conveyed to the power manager until the reservation table corresponding to the execution unit to be turned off is empty.Type: GrantFiled: July 8, 2005Date of Patent: July 8, 2008Assignee: National Tsing Hua UniversityInventors: Jenq-Kuen Lee, Yung-Chia Lin, Yi-Ping Yu, Chung-Wen Huang
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Patent number: 7337376Abstract: A system and method of self-test for a single infrared machine. An infrared transimit circuit may be set up succesfully by only using a host with an external infrared module without a use of another test machine. A test procedure is excuted through the infrared transmit circuit to ascertain the function of the infrared module in the host is properly functioning.Type: GrantFiled: June 4, 2004Date of Patent: February 26, 2008Assignee: Inventec CorporationInventors: Chung-Wen Huang, Shun-Hsien Chao
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Publication number: 20070157044Abstract: A method of power-gating instruction scheduling for leakage power reduction comprises receiving a program, generating a control-flow graph dividing the program into a plurality of blocks, analyzing utilization of power-gated components of a processor executing the program, generating the first power-gating instruction placement comprising power-off instructions and power-on instructions to shut down the inactive power-gated components, generating the second power-gating instruction placement by merging the power-off instructions as one compound power-off instruction and merging the power-on instructions as one compound power-on instruction, and inserting power-gating instructions into the program in accordance with the second power-gating instruction placement.Type: ApplicationFiled: July 27, 2006Publication date: July 5, 2007Inventors: Yi-Ping You, Chung Wen Huang, Jeng Kuen Lee, Chi-Lung Wang, Kuo Yu Chuang