Patents by Inventor Chung-Wen Huang

Chung-Wen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11115595
    Abstract: An electronic device is provided. The electronic device includes a controller, configured to receive an input image signal captured by a camera device, perform a codec process on the input image signal to generate a processed file. The controller is further configured to perform privacy detection on the input image signal or the processed file. In response to the input image signal or the processed file being detected to include privacy information, the controller is further configured to encrypt the processed file to generate an encrypted file.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: September 7, 2021
    Assignee: MEDIATEK INC.
    Inventors: Chung-Wen Huang, Hung-Jen Chen
  • Publication number: 20210067699
    Abstract: An electronic device is provided. The electronic device includes a controller, configured to receive an input image signal captured by a camera device, perform a codec process on the input image signal to generate a processed file. The controller is further configured to perform privacy detection on the input image signal or the processed file. In response to the input image signal or the processed file being detected to include privacy information, the controller is further configured to encrypt the processed file to generate an encrypted file.
    Type: Application
    Filed: September 3, 2019
    Publication date: March 4, 2021
    Inventors: Chung-Wen HUANG, Hung-Jen CHEN
  • Patent number: 8717903
    Abstract: A testing method and an apparatus applied to an IP phone system for testing an electronic device is provided. The electronic device has a true table and signal ports. The electronic device is connected to a power generating jig and an IP phone simulator via a cable. A power generated by the power generating jig is provided. A first value power command issued by the IP phone simulator is provided. Whether the electronic device is able to correctly control the signal ports in response to the first value power command and the true table is determined. A second value power command issued by the IP phone simulator is provided. Whether the electronic device is able to correctly control the signal ports in response to the second value power command and the true table is determined. If so, it is concluded that the electronic device passes the test.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: May 6, 2014
    Assignee: Inventec Corporation
    Inventors: Chung-Wen Huang, Chen-Wu Hsieh
  • Publication number: 20130297851
    Abstract: A peripheral device includes a first memory, a second memory, a first access controller, a second access controller and a main controller. When accessing data, first data is written to the first memory from the main controller while second data is read from the second memory to the main controller. Then the first data is written from the first memory to the second memory after writing the first data to the first memory and reading the second data from the second memory are completed.
    Type: Application
    Filed: May 2, 2012
    Publication date: November 7, 2013
    Inventor: Chung-Wen Huang
  • Publication number: 20130107720
    Abstract: A testing method and an apparatus applied to an IP phone system for testing an electronic device is provided. The electronic device has a true table and signal ports. The electronic device is connected to a power generating jig and an IP phone simulator via a cable. A power generated by the power generating jig is provided. A first value power command issued by the IP phone simulator is provided. Whether the electronic device is able to correctly control the signal ports in response to the first value power command and the true table is determined. A second value power command issued by the IP phone simulator is provided. Whether the electronic device is able to correctly control the signal ports in response to the second value power command and the true table is determined. If so, it is concluded that the electronic device passes the test.
    Type: Application
    Filed: December 28, 2011
    Publication date: May 2, 2013
    Applicant: INVENTEC CORPORATION
    Inventors: Chung-Wen Huang, Chen-Wu Hsieh
  • Patent number: 8158893
    Abstract: An EMI/ESD protection module is disposed between a first metal connecting member and a second metal connecting member. The EMI/ESD protection module includes a first conductive member, a second conductive member and a resilient member. The first conductive member is electrically connected to the first metal connecting member. The second conductive member is movably connected to the first conductive member and electrically connected to the second metal connecting member. The resilient member is disposed between the first and second conductive members.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: April 17, 2012
    Assignee: Transcend Information, Inc.
    Inventors: Chung-Won Shu, Chih-Heng Chiu, Din-Ji Tzou, Chung-Wen Huang
  • Publication number: 20110162878
    Abstract: An EMI/ESD protection module is disposed between a first metal connecting member and a second metal connecting member. The EMI/ESD protection module includes a first conductive member, a second conductive member and a resilient member. The first conductive member is electrically connected to the first metal connecting member. The second conductive member is movably connected to the first conductive member and electrically connected to the second metal connecting member. The resilient member is disposed between the first and second conductive members.
    Type: Application
    Filed: February 4, 2010
    Publication date: July 7, 2011
    Inventors: Chung-Won Shu, Chih-Heng Chiu, Din-Ji Tzou, Chung-Wen Huang
  • Publication number: 20110157839
    Abstract: A filtering module includes a circuit board, a connector, a core and a plurality of coils. The connector and the core are disposed on the circuit board. The coils wind around the core and are electrically connected to the connector.
    Type: Application
    Filed: January 27, 2010
    Publication date: June 30, 2011
    Inventors: Chung-Won Shu, Chih-Heng Chiu, Din-Ji Tzou, Chung-Wen Huang
  • Patent number: 7779412
    Abstract: A system chip includes a plurality of processing elements for performing primary computations of a plurality of tasks, a plurality of non-processing elements for controlling flow of data associated with the tasks among the processing elements, and a main controller including a scheduler, a resource allocation module, and a power management module. The scheduler assigns the tasks on the processing and non-processing elements with reference to time parameters of the processing and non-processing elements. The resource allocation module controls operations of the processing and non-processing elements with reference to task assignments determined by the scheduler. The power management module performs dynamic voltage management upon the processing and non-processing elements according to the scheduled tasks.
    Type: Grant
    Filed: September 19, 2005
    Date of Patent: August 17, 2010
    Assignee: National Tsing Hua University
    Inventors: Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq-Kuen Lee
  • Publication number: 20100084180
    Abstract: An electronic device includes a circuit board and a shielding member. The circuit board includes a pair of frames and a plurality of mounting holes disposed between the frames. The pair of frames surround at least one electronic component positioned within an area defined within the pair of frames. The shielding member is configured for shielding the electronic component from electromagnetic interference (EMI), and includes a top wall, a plurality of sidewalls, and a plurality of mounting portion extending from end portions of the sidewalls. The top wall and the sidewalls cooperatively bound a receiving space to receive the at least one electronic component. The mounting portions are received in the corresponding mounting holes to attach the shielding member to the circuit board.
    Type: Application
    Filed: March 25, 2009
    Publication date: April 8, 2010
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: SHE-FEN CHIANG, CHUNG-WEN HUANG
  • Patent number: 7539884
    Abstract: A method of power-gating instruction scheduling for leakage power reduction comprises receiving a program, generating a control-flow graph dividing the program into a plurality of blocks, analyzing utilization of power-gated components of a processor executing the program, generating the first power-gating instruction placement comprising power-off instructions and power-on instructions to shut down the inactive power-gated components, generating the second power-gating instruction placement by merging the power-off instructions as one compound power-off instruction and merging the power-on instructions as one compound power-on instruction, and inserting power-gating instructions into the program in accordance with the second power-gating instruction placement.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: May 26, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Ping You, Chung Wen Huang, Jeng Kuen Lee, Chi-Lung Wang, Kuo Yu Chuang
  • Patent number: 7398410
    Abstract: A processor includes a plurality of execution units configured to execute instructions, a pre-decoder configured to sieve out a power-switching instruction from the instructions, and a power controller configured to control the status of the execution unit based on the power-switching instruction. The power controller includes an identification decoder configured to generate identifications respectively corresponding to the execution units from the power-switching instruction, and a power manager configured to switch the execution unit corresponding to the identification. Particularly, the power-switching instruction includes a power-on instruction and a power-off instruction. The processor further includes a plurality of reservation tables each configured to store the instruction to be executed by one of the execution units, and a turn-off signal is not conveyed to the power manager until the reservation table corresponding to the execution unit to be turned off is empty.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: July 8, 2008
    Assignee: National Tsing Hua University
    Inventors: Jenq-Kuen Lee, Yung-Chia Lin, Yi-Ping Yu, Chung-Wen Huang
  • Patent number: 7337376
    Abstract: A system and method of self-test for a single infrared machine. An infrared transimit circuit may be set up succesfully by only using a host with an external infrared module without a use of another test machine. A test procedure is excuted through the infrared transmit circuit to ascertain the function of the infrared module in the host is properly functioning.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: February 26, 2008
    Assignee: Inventec Corporation
    Inventors: Chung-Wen Huang, Shun-Hsien Chao
  • Publication number: 20070157044
    Abstract: A method of power-gating instruction scheduling for leakage power reduction comprises receiving a program, generating a control-flow graph dividing the program into a plurality of blocks, analyzing utilization of power-gated components of a processor executing the program, generating the first power-gating instruction placement comprising power-off instructions and power-on instructions to shut down the inactive power-gated components, generating the second power-gating instruction placement by merging the power-off instructions as one compound power-off instruction and merging the power-on instructions as one compound power-on instruction, and inserting power-gating instructions into the program in accordance with the second power-gating instruction placement.
    Type: Application
    Filed: July 27, 2006
    Publication date: July 5, 2007
    Inventors: Yi-Ping You, Chung Wen Huang, Jeng Kuen Lee, Chi-Lung Wang, Kuo Yu Chuang
  • Publication number: 20070029993
    Abstract: The present invention is to provide an automatic electric discharge tool, which comprises a control unit and an energy consuming module, wherein the control unit electrically coupled to a plurality of energy storage devices to receive information signals sent and obtain the remaining power capacity, remaining power supply time and battery voltage of the energy storage device; and the energy consuming module electrically respectively coupled to the control unit and energy storage device in purpose to receiving and consuming the power of each energy storage device, furthermore, the control unit determines and then sends a switch signal to make the energy consuming module to stop consuming the power of the energy storage device when the power capacity dropping to 60% of the total power capacity.
    Type: Application
    Filed: August 8, 2005
    Publication date: February 8, 2007
    Applicant: INVENTEC CORPORATION
    Inventors: Shun-Hsien Chao, Chung-Wen Huang, Hung-Sheng Wang
  • Publication number: 20070011474
    Abstract: A processor includes a plurality of execution units configured to execute instructions, a pre-decoder configured to sieve out a power-switching instruction from the instructions, and a power controller configured to control the status of the execution unit based on the power-switching instruction. The power controller includes an identification decoder configured to generate identifications respectively corresponding to the execution units from the power-switching instruction, and a power manager configured to switch the execution unit corresponding to the identification. Particularly, the power-switching instruction includes a power-on instruction and a power-off instruction. The processor further includes a plurality of reservation tables each configured to store the instruction to be executed by one of the execution units, and a turn-off signal is not conveyed to the power manager until the reservation table corresponding to the execution unit to be turned off is empty.
    Type: Application
    Filed: July 8, 2005
    Publication date: January 11, 2007
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Jenq-Kuen Lee, Yung-Chia Lin, Yi-Ping Yu, Chung-Wen Huang
  • Publication number: 20060064696
    Abstract: A system chip includes a plurality of processing elements for performing primary computations of a plurality of tasks, a plurality of non-processing elements for controlling flow of data associated with the tasks among the processing elements, and a main controller including a scheduler, a resource allocation module, and a power management module. The scheduler assigns the tasks on the processing and non-processing elements with reference to time parameters of the processing and non-processing elements. The resource allocation module controls operations of the processing and non-processing elements with reference to task assignments determined by the scheduler. The power management module performs dynamic voltage management upon the processing and non-processing elements according to the scheduled tasks.
    Type: Application
    Filed: September 19, 2005
    Publication date: March 23, 2006
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq-Kuen Lee
  • Publication number: 20050269498
    Abstract: A system and method of self-test for a single infrared machine. An infrared transimit circuit may be set up succesfully by only using a host with an external infrared module without a use of another test machine. A test procedure is excuted through the infrared transmit circuit to ascertain the function of the infrared module in the host is properly functioning.
    Type: Application
    Filed: June 4, 2004
    Publication date: December 8, 2005
    Applicant: Inventec Corporation
    Inventors: Chung-Wen Huang, Shun-Hsien Chao