Patents by Inventor Chung-Wen Ma

Chung-Wen Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10778530
    Abstract: Systems, methods, and computer-readable media are provided for wireless communications and computer networking, including wireless sensor networks. In embodiments, a first device stores an indication of a received second heartbeat signal broadcasted by a second device. The second heartbeat signal is for accessing or maintaining a service provided by a service provider and/or an access network node (AN). The first device generates a first heartbeat signal to include the indication of the second heartbeat signal. The indication of the second heartbeat signal in the first heartbeat signal is for facilitating discovery of the second device by the AN. Other embodiments are disclosed and/or claimed.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: September 15, 2020
    Assignee: Intel Corporation
    Inventor: Chung-Wen Ma
  • Publication number: 20190140908
    Abstract: Systems, methods, and computer-readable media are provided for wireless communications and computer networking, including wireless sensor networks. In embodiments, a first device stores an indication of a received second heartbeat signal broadcasted by a second device. The second heartbeat signal is for accessing or maintaining a service provided by a service provider and/or an access network node (AN). The first device generates a first heartbeat signal to include the indication of the second heartbeat signal. The indication of the second heartbeat signal in the first heartbeat signal is for facilitating discovery of the second device by the AN. Other embodiments are disclosed and/or claimed.
    Type: Application
    Filed: December 27, 2018
    Publication date: May 9, 2019
    Inventor: Chung-Wen Ma
  • Patent number: 5956473
    Abstract: The present application discloses methods to provide defect management, wear leveling and data security to a mass storage system implemented using flash memory. The flash memory is organized into a plurality of blocks. Each block has a special region for storing its attributes. In defect management, defects arising from manufacturing and on-the-fly defects are scanned. Defective blocks are marked by altering its attributes. The present application also discloses a wear leveling method in which the difference between the number of erasures of any two blocks (except the defective blocks) is within a predetermined value. The present application further discloses a new error detection and correction method. The same data is stored in two separate memory locations. The content of these two locations are later "ored" or "anded" together (depending on the nature of error giving rise to the error) to recover the correct data.
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: September 21, 1999
    Assignee: Macronix International Co., Ltd.
    Inventors: Chung-Wen Ma, Chun-Hung Lin, Tai-Yao Lee, Li-Jen Lee, Ju-Xu Lee, Ting-Chung Hu
  • Patent number: 5933368
    Abstract: An architecture for a mass storage system using flash memory is described. This architecture involves organizing the flash memory into a plurality of blocks. These blocks are then divided into several categories. One of the categories is a working category used to store data organized in accordance with a pre-defined addressing scheme (such as the logical block address used in Microsoft's operating system). The other category is a temporary buffer used to store data intended to be written to one of the working blocks. Another category contains blocks that need to be erased. When data is written into the mass storage system, a block in the second category is allocated from a block in the third category. The allocated block will then be changed to a block in the first category when writing to the allocated block is completed. The correspond block in the first category is placed into the third category. As a result, blocks can be recycled.
    Type: Grant
    Filed: April 27, 1998
    Date of Patent: August 3, 1999
    Assignee: Macronix International Co., Ltd.
    Inventors: Chung-Wen Ma, Chu-Hung Lin, Tai-Yao Lee, Li-Jen Lee, Ju-Xu Lee, Ting-Chung Hu
  • Patent number: 5745418
    Abstract: An architecture for a mass storage system using flash memory is described. This architecture involves organizing the flash memory into a plurality of blocks. These blocks are then divided into several categories. One of the categories is a working category used to store data organized in accordance with a pre-defined addressing scheme (such as the logical block address used in Microsoft's operating system). The other category is a temporary buffer used to store data intended to be written to one of the working blocks. Another category contains blocks that need to be erased. When data is written into the mass storage system, a block in the second category is allocated from a block in the third category. The allocated block will then be changed to a block in the first category when writing to the allocated block is completed. The correspond block in the first category is placed into the third category. As a result, blocks can be recycled.
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: April 28, 1998
    Assignee: Macronix International Co., Ltd.
    Inventors: Chung-Wen Ma, Chun-Hung Lin, Tai-Yao Lee, Li-Jen Lee, Ju-Xu Lee, Ting-Chung Hu