Abstract: A package structure is provided, and includes a first bonding film formed on a first substrate, and a first alignment mark formed in the first bonding film. The first alignment mark includes a plurality of first patterns spaced apart from each other. The package structure includes a second bonding film formed on a second substrate and bonded to the first bonding film, and a second alignment mark formed in the second bonding film. The second alignment mark includes a plurality of second patterns spaced apart from each other. In a top view, the first alignment mark is spaced apart from the second alignment mark, and the distance between adjacent first patterns is less than the distance between the first alignment mark and the second alignment mark.

Abstract: An energy storage device capable of suppressing battery spread of battery fire includes a control module and a plurality of battery modules, and the battery modules respectively include an accommodation space, a plurality of battery packs, a plurality of temperature sensors and a controller. The controller provides a first control signal to notify the control module based on an ambient temperature detected by one of the temperature sensors being greater than or equal to a first specific temperature range. The control module is used to transfer a battery capacity of an abnormal battery module of the battery modules providing the first control signal to a backup energy storage module, and the backup energy storage module includes the battery modules except the abnormal battery module or a next-stage device.

Abstract: A fingerprint sensor package and method are provided. Embodiments include a sensor and a sensor surface material encapsulated within the fingerprint sensor package. An array of electrodes of the sensor are electrically connected using through vias that are located either in the sensor, in connection blocks separated from the sensor, or through connection blocks, or else connected through other connections such as wire bonds. A high voltage die is attached in order to increase the sensitivity of the fingerprint sensor.

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip comprising a semiconductor device that is inverted and that overlies a dielectric region inset into a top of a semiconductor substrate. An interconnect structure overlies the semiconductor substrate and the dielectric region and further comprises an intermetal dielectric (IMD) layer. The IMD layer is bonded to the top of the semiconductor substrate and accommodates a pad. A semiconductor layer overlies the interconnect structure, and the semiconductor device is in the semiconductor layer, between the semiconductor layer and the interconnect structure. The semiconductor device comprises a first source/drain electrode overlying the dielectric region and further overlying and electrically coupled to the pad. The dielectric region reduces substrate capacitance to decrease substrate power loss and may, for example, be a cavity or a dielectric layer. A contact extends through the semiconductor layer to the pad.

Abstract: A vacuum breaker valve includes a valve body and a vacuum breaking device mounted in the valve body. The valve body has a periphery provided with multiple air vent holes corresponding to the vacuum breaking device. The vacuum breaking device includes a mounting barrel, an elastic member, a braking member, a mounting plate, a water stop gasket, and a water inlet disk. The vacuum breaking device is assembled previously and then directly fitted into the valve body to construct the vacuum breaker valve. Thus, the vacuum breaking device and the valve body are combined together for a whole sale or the vacuum breaking device and the valve body are sold individually.

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip comprising a semiconductor device that is inverted and that overlies a dielectric region inset into a top of a semiconductor substrate. An interconnect structure overlies the semiconductor substrate and the dielectric region and further comprises an intermetal dielectric (IMD) layer. The IMD layer is bonded to the top of the semiconductor substrate and accommodates a pad. A semiconductor layer overlies the interconnect structure, and the semiconductor device is in the semiconductor layer, between the semiconductor layer and the interconnect structure. The semiconductor device comprises a first source/drain electrode overlying the dielectric region and further overlying and electrically coupled to the pad. The dielectric region reduces substrate capacitance to decrease substrate power loss and may, for example, be a cavity or a dielectric layer. A contact extends through the semiconductor layer to the pad.

Abstract: A battery module capable of suppressing spread of battery fire including a case, a plurality of battery packs, a plurality of temperature sensors, an energy consumption module and a controller. The case forms an accommodation space, and the battery packs is accommodated in the accommodation space. The temperature sensors are dispersedly configured to the accommodation space, and the temperature sensors respectively detect an ambient temperature around configure locations. The controller is coupled to the temperature sensors, and when the ambient temperature detected by one of the temperature sensors is greater than or equal to a first specific temperature range, the controller controls the energy consumption module to consume a battery capacity of at least one battery pack around the one of the temperature sensors.

Abstract: A vacuum breaker valve includes a valve body and a vacuum breaking device mounted in the valve body. The valve body has a periphery provided with multiple air vent holes corresponding to the vacuum breaking device. The vacuum breaking device includes a mounting barrel, an elastic member, a braking member, a mounting plate, a water stop gasket, and a water inlet disk. The vacuum breaking device is assembled previously and then directly fitted into the valve body to construct the vacuum breaker valve. Thus, the vacuum breaking device and the valve body are combined together for a whole sale or the vacuum breaking device and the valve body are sold individually.

Abstract: A method of testing a non-volatile memory (NVM) array includes heating the NVM array to a target temperature, and while the NVM array is heated to the target temperature, programming a subset of the NVM cells to first resistance levels and obtaining a first current distribution, programming the subset of NVM cells to second resistance levels and obtaining a second current distribution, calculating a current threshold level from the first and second current distributions, and for each of the NVM cells, programing the NVM cell to one of the first or second resistance levels, and using the current threshold level to determine a first pass/fail (P/F) status and a second P/F status at the programmed resistance level. A bit error rate (BER) of the NVM array is calculated based on the first and second current distributions and the first and second P/F status of each of the NVM cells.

Abstract: It is checked, using machine learning, whether at least one fail bit in a memory block of a memory is unrepairable, according to a location of the at least one fail bit, and an available repair resource in the memory. When the checking indicates that the at least one fail bit is not unrepairable, it is determined whether a CSP containing constraints is solvable. The constraints correspond to the location of the at least one fail bit in the memory block, and the available repair resource. In response to determining that the CSP is not solvable, the memory block is marked as unrepairable or the memory is rejected. In response to the checking, using the machine learning, indicating that the at least one fail bit is unrepairable, the memory block is marked as unrepairable or the memory is rejected, without making further determinations as to repairability of the memory block.

Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern.

Abstract: A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion.

Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.

Abstract: A package structure includes a semiconductor device, a molding compound, a first dielectric layer, and a through-via. The molding compound is in contact with a sidewall of the semiconductor device. The first dielectric layer is over the molding compound and the semiconductor device. The through-via is in the molding compound and the first dielectric layer. The through-via is a continuous element and in contact with the first dielectric layer.

Abstract: A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion.

Abstract: An assembly of an electronic device and a stand includes an electronic device, a stand and two springs. The electronic device includes two first clutches located on both sides of the electronic device. The stand includes two pivot ends which are symmetrically pivoted to the both sides of the electronic device. Each pivot end includes a second clutch formed to an inside thereof and engaged with the first clutch of the electronic device to form a locking position and an unlocking position. The springs are respectively located between the electronic device and the stand. When no external force applied, each pivot end engaged with the first clutch corresponding thereto to form a locking position. When each pivot end is pulled in a direction away from the first clutch, the second clutch is disengaged from the first clutch to form an unlocking position, and the stand is pivotable relative to the electronic device.

Abstract: Disclosed is a headphone including a headband and two ear cups connected to opposite ends of the headband. Each of the ear cups includes a shell, a front cover, and a light sensor. The shell has an open end. The front cover covers the open end of the shell. The front cover is in a basin form and has a peripheral sidewall and a bottom wall. The light sensor is located on the peripheral sidewall of the front cover. The light sensor includes a light-emitting unit and a light detection unit. When a user wears the headphone, light emitted by the light-emitting unit irradiates a flat portion of a back surface of an ear of the user.

Abstract: Disclosed is a headphone including a headband and two ear cups connected to opposite ends of the headband. Each of the ear cups includes a shell, a front cover, and a light sensor. The shell has an open end. The front cover covers the open end of the shell. The front cover is in a basin form and has a peripheral sidewall and a bottom wall. The light sensor is located on the peripheral sidewall of the front cover. The light sensor includes a light-emitting unit and a light detection unit. When a user wears the headphone, light emitted by the light-emitting unit irradiates a flat portion of a back surface of an ear of the user.

Abstract: Disclosed is an open ear headphone, including a housing, a speaker arranged in an accommodating space inside the housing to define the accommodating space into a front cavity and a rear cavity, a connecting member including opposite first and second ends, and a supporting member connected to the second end and including a supporting portion and a sound outlet channel. A sound outlet is provided on a surface of the housing and is in acoustic communication with the front cavity. The first end is connected to the surface of the housing. When a user wears the open ear headphone, the housing is located in a concha cavity of the user's ear, the supporting portion at least leans against a lower edge of the concha cavity, and the sound outlet channel is in acoustic communication with the user's ear canal and is not in contact with the user's ear.

Abstract: Disclosed is an open ear headphone, including a housing, a speaker arranged in an accommodating space inside the housing to define the accommodating space into a front cavity and a rear cavity, a connecting member including opposite first and second ends, and a supporting member connected to the second end and including a supporting portion and a sound outlet channel. A sound outlet is provided on a surface of the housing and is in acoustic communication with the front cavity. The first end is connected to the surface of the housing. When a user wears the open ear headphone, the housing is located in a concha cavity of the user's ear, the supporting portion at least leans against a lower edge of the concha cavity, and the sound outlet channel is in acoustic communication with the user's ear canal and is not in contact with the user's ear.