Abstract: The embodiments of the disclosure provide a method for reducing computational loading while generating a content and a host. The method includes: obtaining a texture map and a plurality of object texture coordinates, wherein the object texture coordinates correspond to at least one virtual object in the texture map; obtaining a first mesh map corresponding to the texture map; determining a first mesh segment and a second mesh segment within the first mesh map based on the object texture coordinates, wherein the first mesh segment does not correspond to the object texture coordinates, and the second mesh segment corresponds to the object texture coordinates; modifying the first mesh map into a second mesh map via reducing a first segment area of the first mesh segment; and generating a visual content via performing an asynchronous time warp operation on the texture map based on the second mesh map.

Abstract: A method for recording a video conference and a video conferencing system are provided. The method includes: providing a user interface to a display device, in which the user interface includes a first area, a second area, and a timeline; in response to obtaining an image corresponding to each of multiple participants from a video signal through a person recognition algorithm, displaying the image of each participant in the first area; in response to converting an audio segment of one of the participants obtained from an audio signal into text content through a voice processing algorithm, associating the text content with the corresponding one of the participants, and based on an order of speaking, displaying the text content in the second area; and adjusting a time length of the timeline according to a recording time of the video conference.

Abstract: A method for switching audio reception in a video conference and a video conferencing system are provided. In a case of starting the video conference, relative positions of participants in a conference space and behavioral events of participants are obtained by identifying a video signal. Based on the behavioral event of each participant, whether each participant is in a non-speaking behavior is determined. When a participant is determined to be a non-speaker in the non-speaking behavior, an audio reception range of an audio reception device is adjusted to filter a voice of the non-speaker based on the relative position of the non-speaker in the conference space. When a participant is determined to be a speaker not in the non-speaking behavior, the audio reception range of the audio reception device is adjusted to receive a voice of the speaker based on the relative position of the speaker in the conference space.

Abstract: A moving device, applied in a nucleic acid extraction system and cooperated with a plurality of microtube components, the moving device includes: a workbench; a moving component, disposed on the workbench; a control element, disposed on the moving component and electrically connected to the moving component; a first motor, disposed on the moving component and electrically connected to the control element; a first rotating rod, connected to the first motor; a second motor, disposed on the moving component and electrically connected to the control element; a second rotating rod, connected to the second motor; and a telescopic component, disposed on the moving component corresponding to the first rotating rod and the second rotating rod, electrically connected to the control element, and movable between a first position and a second position.

Abstract: A semiconductor package is provided. The semiconductor package includes: semiconductor dies, separated from one another, and including die I/Os at their active sides; and a redistribution structure, disposed at the active sides of the semiconductor dies and connected to the die I/Os, wherein the redistribution structure includes first and second routing layers sequentially arranged along a direction away from the die I/Os, the first routing layer includes a ground plane and first signal lines laterally surrounded by and isolated from the first ground plane, the first signal lines connect to the die I/Os and rout the die I/Os from a central region to a peripheral region of the redistribution structure, the second routing layer includes second signal lines and ground lines, and the second signal lines and the ground lines respectively extend from a location in the peripheral region to another location in the peripheral region through the central region.

Abstract: Disclosed herein are novel single-stranded anti-sense oligonucleotides (ASOs) capable of reducing the transcription of thioredoxin domain containing protein 5 (TXNDC5) mRNA. Also disclosed is use of the single-stranded ASOs as disclosed herein for manufacturing medicaments suitable for treating a disease associated with upregulation of TXNDC5. Accordingly, a pharmaceutical composition comprising the disclosed ASO molecules is provided; as well as a method of treating a subject suffering from TXNDC5-mediated disease via administering to the subject the disclosed single-stranded ASO molecules.

Abstract: The present disclosure relates to use of 10?(Z), 13?(E), 15?(E)-Heptadecatrienyl hydroquinone compound (hereafter “HQ17(3)”) represented by the following Formula (12), a pharmaceutically acceptable salt, and/or a solvate and/or a hydrate thereof, and a pharmaceutical composition comprising the above compound, in treating coronavirus infection and diseases caused by the infection, especially SARS-COV-2 infection.

Abstract: A semiconductor device according to the present disclosure includes a dielectric fin having a helmet layer, a gate structure disposed over a first portion of the helmet layer and extending along a direction, and a dielectric layer adjacent the gate structure and disposed over a second portion of the helmet layer. A width of the first portion along the direction is greater than a width of the second portion along the direction.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. An alignment process is performed on a first semiconductor workpiece and a second semiconductor workpiece by virtue of a plurality of workpiece pins. The first semiconductor workpiece is bonded to the second semiconductor workpiece. A shift value is determined between the first and second semiconductor workpieces by virtue of a first plurality of alignment marks on the first semiconductor workpiece and a second plurality of alignment marks on the second semiconductor workpiece. A layer of an integrated circuit (IC) structure is formed over the second semiconductor workpiece based at least in part on the shift value.

Abstract: A package structure and a method for forming the same are provided. The package structure includes a first package structure and a second package structure. The first package structure includes a first device formed over a first substrate. The first device includes a first conductive plug connected to a through substrate via (TSV) structure formed in the first substrate. A buffer layer surrounds the first substrate. A first bonding layer is formed over the first substrate and the buffer layer. The second package structure includes a second device formed over a second substrate. A second bonding layer is formed over the second device. A hybrid bonding structure is between the first package structure and the second package structure by bonding the first bonding layer to the second bonding layer.

Abstract: A method of removing a step height on a gate structure includes providing a substrate. A gate structure is disposed on the substrate. A dielectric layer covers the gate structure and the substrate. Then, a composite material layer is formed to cover the dielectric layer. Later, part of the composite material layer is removed to form a step height disposed directly on the gate structure. Subsequently, a wet etching is performed to remove the step height. After the step height is removed, the dielectric layer is etched to form a first contact hole to expose the gate structure.

Abstract: An apparatus including a pixel electrode circuit is provided. The pixel electrode circuit includes a first switch, a second switch, a first-type transistor, a first second-type transistor, and a second second-type transistor. The first switch and the second switch are respectively controlled by a first control signal and a second control signal. The first-type transistor includes a gate electrically connected to a first node, a first terminal connected to a first power supply voltage, and a second terminal connected to a third node. The first second-type transistor includes a gate electrically connected to a second node, a first terminal connected to a second power supply voltage, and a second terminal connected to the third node. The second second-type transistor includes a gate electrically connected to the second node, a first terminal being grounded, and a second terminal providing an output voltage.

Abstract: An apparatus including a pixel electrode circuit is provided. The pixel electrode circuit includes a first switch, a second switch, a first-type transistor, a first second-type transistor, and a second second-type transistor. The first switch and the second switch are respectively controlled by a first control signal and a second control signal. The first-type transistor includes a gate electrically connected to a first node, a first terminal connected to a first power supply voltage, and a second terminal connected to a third node. The first second-type transistor includes a gate electrically connected to a second node, a first terminal connected to a second power supply voltage, and a second terminal connected to the third node. The second second-type transistor includes a gate electrically connected to the second node, a first terminal being grounded, and a second terminal providing an output voltage.

Abstract: An apparatus including a pixel electrode circuit is provided. The pixel electrode circuit includes a first switch, a second switch, a first-type transistor, a first second-type transistor, and a second second-type transistor. The first switch and the second switch are respectively controlled by a first control signal and a second control signal. The first-type transistor includes a gate electrically connected to a first node, a first terminal connected to a first power supply voltage, and a second terminal connected to a third node. The first second-type transistor includes a gate electrically connected to a second node, a first terminal connected to a second power supply voltage, and a second terminal connected to the third node. The second second-type transistor includes a gate electrically connected to the second node, a first terminal being grounded, and a second terminal providing an output voltage.

Abstract: An apparatus and a system are provided. The system includes a top plate electrode, a dielectric layer, a plurality of pixel electrode circuits, and a plurality of detection circuits. A droplet is disposed between the top plate electrode and the dielectric layer. The plurality of pixel electrode circuits are arranged in a two-dimensional array. The pixel electrode circuits in each column of the two-dimensional array are electrically connected to a respective detection circuit of the plurality of detection circuits.

Abstract: An apparatus including a pixel electrode circuit is provided. The pixel electrode circuit includes a first switch, a second switch, a first-type transistor, a first second-type transistor, and a second second-type transistor. The first switch and the second switch are respectively controlled by a first control signal and a second control signal. The first-type transistor includes a gate electrically connected to a first node, a first terminal connected to a first power supply voltage, and a second terminal connected to a third node. The first second-type transistor includes a gate electrically connected to a second node, a first terminal connected to a second power supply voltage, and a second terminal connected to the third node. The second second-type transistor includes a gate electrically connected to the second node, a first terminal being grounded, and a second terminal providing an output voltage.

Abstract: An automated test mechanism includes: preparing test software capable of reading and processing a file in a general form, and making the test software support N kinds of communication interfaces, M kinds of communication protocols, and multiple commands of K kinds of instruments, wherein the general form includes an interface setting part, a communication protocol setting part, and a function list part; creating multiple general form files in the general form to support the K kinds of instruments, wherein the multiple general form files include a first file and a second file that are prepared for a first instrument and a second instrument of the multiple instruments respectively; and when performing a first test with the first instrument, choosing the first file for the first test, and when performing a second test with the second instrument, choosing the second file for the second test.

Abstract: A display apparatus is provided. The display apparatus includes a graphic processing unit, a display driver, and a display panel. The graphic processing unit is configured to provide a first image. The display driver is configured to correct an optical aberration of the first image to generate a second image. The display panel is configured to display the second image.

Abstract: A driving circuit for an electrowetting on dielectric (EWOD) pixel. The driving circuit includes a latch circuit for transmitting a source data pulse to a storage capacitor in response to an activation gate signal applied to the gate of the switch transistor and generating a latch voltage and an inversion circuit for outputting a driving voltage at either a first power voltage or a second power voltage based on the latch voltage generated by the latch circuit.

Abstract: There is provided a heating device to independently and/or effectively heat the micro objects manipulated by a micro apparatus/system, for example the droplets of fluids in an electrowetting on dielectric EWOD device of a microfluidic apparatus. The heating device may include a plurality of micro heaters arranged in an array of rows and columns, and the micro heaters of the heating device may be disposed in relative to the electrode elements of the EWOD device, respectively. Therefore, the micro heaters of the heating device may heat one of the electrode elements of the EWOD device, thereby preventing thermal effect of the micro object on the other electrode elements.