Patents by Inventor Chung-Yi Wu

Chung-Yi Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200058737
    Abstract: A silicon-on-insulator (SOI) substrate includes a semiconductor substrate and a multi-layered polycrystalline silicon structure. The multi-layered polycrystalline silicon structure is disposed over the semiconductor substrate. The multi-layered polycrystalline silicon structure includes a plurality of doped polycrystalline silicon layers stacked over one another, and an oxide layer between each adjacent pair of doped polycrystalline silicon layers. A number of the doped polycrystalline silicon layer is ranging from 2 to 6.
    Type: Application
    Filed: October 23, 2019
    Publication date: February 20, 2020
    Inventors: CHENG-TA WU, KUO-HWA TZENG, CHIH-HAO WANG, YEUR-LUEN TU, CHUNG-YI YU
  • Publication number: 20200043739
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Application
    Filed: October 8, 2019
    Publication date: February 6, 2020
    Inventors: Hong-Ying LIN, Cheng-Yi WU, Alan TU, Chung-Liang CHENG, Li-Hsuan CHU, Ethan HSIAO, Hui-Lin SUNG, Sz-Yuan HUNG, Sheng-Yung LO, C.W. CHIU, Chih-Wei Hsieh, Chin-Szu LEE
  • Publication number: 20200038497
    Abstract: The disclosure provides various immunogens comprising a repeat unit of saccharide of Klebsiella pneumoniae CPS, which has a formula selected from the group consisting of Formulae (I) to (VI) as described herein. Also provided are vaccines including one or more immunogens selected from Formula (I) to (VI) and methods of eliciting an immune response against a Klebsiella pneumoniae and preventing infection of Klebsiella pneumoniae by using an immunogen of the invention.
    Type: Application
    Filed: October 3, 2017
    Publication date: February 6, 2020
    Applicants: NATIONAL TAIWAN UNIVERSITY, Academia Sinica
    Inventors: Jin-Town Wang, Shih-Hsiung Wu, Chung-Yi Wu
  • Patent number: 10555424
    Abstract: A structure, a semiconductor device and a manufacturing method thereof are provided. The structure includes a core dielectric layer, a patterned conductive plate, a metallization layer, an upper build-up stack and a lower dielectric layer. The patterned conductive plate has ducts there-through and is entrenched in the core dielectric layer. The metallization layer is disposed within the ducts and further extends over an upper surface and a bottom surface of the core dielectric layer. The upper build-up stack is disposed on the upper surface of the core dielectric layer. The upper build-up stack includes conductive layers electrically connected to the metallization layer. The lower dielectric layer is disposed on the bottom surface of the core dielectric layer and is in direct physical contact with a bottom surface of the patterned conductive plate. A material of the lower dielectric layer is different from a material of the core dielectric layer.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: February 4, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jiun-Yi Wu, Chien-Hsun Lee, Chen-Hua Yu, Chung-Shi Liu
  • Publication number: 20200020662
    Abstract: A method includes aligning a first electrical connector of a first package component to a second electrical connector of a second package component. With the first electrical connector aligned to the second electrical connector, a metal layer is plated on the first and the second electrical connectors. The metal layer bonds the first electrical connector to the second electrical connector.
    Type: Application
    Filed: September 24, 2019
    Publication date: January 16, 2020
    Inventors: Zheng-Yi Lim, Yi-Wen Wu, Tzong-Hann Yang, Ming-Che Ho, Chung-Shi Liu
  • Publication number: 20200006208
    Abstract: A semiconductor structure includes a first die, a molding at least partially surrounding the first die, a via extended through the molding, a second die disposed over the molding, a connector dispose between the second die and the via, and an underfill at least partially surrounding the connector. The first die includes a first surface and a second surface opposite to the first surface. The second die includes a third surface facing the first die, a fourth surface opposite to the third surface, and a sidewall between the third surface and the fourth surface. The connector is in contact with the third surface of the second die and the via. The second die is electrically connected to the via. The underfill covers a portion of the sidewall of the second die and a portion of the second surface of the first die.
    Type: Application
    Filed: September 11, 2019
    Publication date: January 2, 2020
    Inventors: JIUN-YI WU, CHEN-HUA YU, CHUNG-SHI LIU, CHIEN HSUN LEE
  • Publication number: 20200006241
    Abstract: A method of forming a semiconductor device includes arranging a semi-finished substrate, which has been tested and is known to be good, on a carrier substrate. Encapsulating the semi-finished substrate in a first encapsulant and arranging at least one semiconductor die over the semi-finished substrate. Electrically coupling at least one semiconductor component of the at least one semiconductor die to the semi-finished substrate and encasing the at least one semiconductor die and portions of the first encapsulant in a second encapsulant. Removing the carrier substrate from the semi-finished substrate and bonding a plurality of external contacts to the semi-finished substrate.
    Type: Application
    Filed: November 9, 2018
    Publication date: January 2, 2020
    Inventors: Jiun Yi Wu, Chen-Hua Yu, Chung-Shi Liu, Chien-Hsun Lee
  • Publication number: 20190391149
    Abstract: Glycan arrays that can detect and distinguish between various sub-types and strains of influenza virus are provided. Methods for using the glycan arrays with assays using nanoparticle amplification technique are disclosed. Sandwich assays using gold nanoparticles conjugated to phage particles comprising influenza virus-specific antibodies for detecting multiple serotypes using a single reaction are provided. Plurality of glycans directed to specific target HA of influenza virus comprises the array. Detector molecules comprising noble metals conjugated to (a) phage display particles expressing antibodies against hemagglutinin and (b) neuraminidase binding agents are disclosed.
    Type: Application
    Filed: July 1, 2019
    Publication date: December 26, 2019
    Inventors: Chi-Huey WONG, Chung-Yi WU, Chi-Hui LIANG, An-Suei YANG
  • Publication number: 20190378809
    Abstract: A method includes placing a package component over a carrier, encapsulating the package component in an encapsulant, and forming a connection structure over and electrically coupling to the package component. The formation of the connection structure includes forming a first via group over and electrically coupling to the package component, forming a first conductive trace over and contacting the first via group, forming a second via group overlying and contacting the first conductive trace, wherein each of the first via group and the second via group comprises a plurality of vias, forming a second conductive trace over and contacting the second via group, forming a top via overlying and contacting the second conductive trace, and forming an Under-Bump-Metallurgy (UBM) over and contacting the top via.
    Type: Application
    Filed: October 11, 2018
    Publication date: December 12, 2019
    Inventors: Chien-Hsun Chen, Jiun Yi Wu, Chien-Hsun Lee, Chung-Shi Liu
  • Patent number: 10497792
    Abstract: A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: December 3, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Carlos H. Diaz, Chung-Cheng Wu, Chia-Hao Chang, Chih-Hao Wang, Jean-Pierre Colinge, Chun-Hsiung Lin, Wai-Yi Lien, Ying-Keung Leung
  • Patent number: 10495645
    Abstract: The present disclosure relates to methods and compositions which can modulate the globoseries glycosphingolipid synthesis. Particularly, the present disclosure is directed to glycoenzyme inhibitor compound and compositions and methods of use thereof that can modulate the synthesis of globoseries glycosphingolipid SSEA-3/SSEA-4/GloboH in the biosynthetic pathway; particularly, the glycoenzyme inhibitors target the alpha-4GalT; beta-4GalNAcT-I; or beta-3GalT-V enzymes in the globoseries synthetic pathway. Additionally, the present disclosure is also directed to vaccines, antibodies, and/or immunogenic conjugate compositions targeting the SSEA-3/SSEA-4/GLOBO H associated epitopes (natural and modified) which elicit antibodies and/or binding fragment production useful for modulating the globoseries glycosphingolipid synthesis. Moreover, the present disclosure is also directed to the method of using the compositions described herein for the treatment or detection of hyperproliferative diseases and/or conditions.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: December 3, 2019
    Assignee: ACADEMIA SINICA
    Inventors: Chi-Huey Wong, Chung-Yi Wu, Sarah K. C. Cheung, Po-Kai Chuang, Tsui-Ling Hsu
  • Patent number: 10483230
    Abstract: A method includes aligning a first electrical connector of a first package component to a second electrical connector of a second package component. With the first electrical connector aligned to the second electrical connector, a metal layer is plated on the first and the second electrical connectors. The metal layer bonds the first electrical connector to the second electrical connector.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: November 19, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zheng-Yi Lim, Yi-Wen Wu, Tzong-Hann Yang, Ming-Che Ho, Chung-Shi Liu
  • Patent number: 10474947
    Abstract: An electronic device is provided. The electronic device comprises: a storage for storing interaction setting information and behavior setting information; an interaction interface; and a processor electrically connected to the storage and the interaction interface. When the processor receives a behavior-driving command from the interaction interface, the processor is configured to select the behavior setting information and the interaction setting information according to the behavior-driving command. The processor is configured to perform a behavior according to the behavior setting information. The processor is further configured to perform an interaction operation based on the behavior according to the behavior setting information and the interaction setting information when the behavior is had. A control method and a non-transitory computer readable storage medium are also provided.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: November 12, 2019
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Wei-Long Lee, Mei-Chieh Ku, Tzu-Yu Kung, Chung-Yi Wu, Tai-Yin Lin, Jia-Wei Chou, Chao-Yang Huang
  • Patent number: 10468486
    Abstract: A silicon-on-insulator (SOI) substrate includes a semiconductor substrate and a multi-layered polycrystalline silicon structure. The multi-layered polycrystalline silicon structure is disposed over the semiconductor substrate. The multi-layered polycrystalline silicon structure includes a plurality of polycrystalline silicon layers stacked over one another, and a native oxide layer between each adjacent pair of polycrystalline silicon layers.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: November 5, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Cheng-Ta Wu, Kuo-Hwa Tzeng, Chih-Hao Wang, Yeur-Luen Tu, Chung-Yi Yu
  • Publication number: 20190328863
    Abstract: Immunogenic compositions comprising hemagglutinin (HA) variants and/or neuraminidase (NA) variants, which may be contained in an influenza A virus, and uses thereof for eliciting immune responses against influenza A virus.
    Type: Application
    Filed: November 8, 2017
    Publication date: October 31, 2019
    Inventors: Chi-Huey WONG, Chung-Yi WU
  • Patent number: 10461022
    Abstract: A semiconductor structure includes a first die including a first surface and a second surface opposite to the first surface; a molding surrounding the first die; a first via extended through the molding; an interconnect structure including a dielectric layer and a conductive member, wherein the dielectric layer is disposed below the first surface of the first die and the molding, and the conductive member is disposed within the dielectric layer; and a second die disposed over the molding, wherein the second die is electrically connected to the first via.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: October 29, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jiun-Yi Wu, Chen-Hua Yu, Chung-Shi Liu, Chien Hsun Lee
  • Patent number: 10424622
    Abstract: A display device comprised of OLEDs and micro LEDs which allows for blue light degradation of the OLEDs includes a first substrate and a second substrate in a double-decked configuration. First light emitting elements are located and spaced on the first substrate and second light emitting elements are located and spaced on the second substrate, the light emitting elements on the lower deck being staggered so as not to be hidden by the light emitting elements on the upper deck. The upper deck has openings (or is transparent) therein to allow egress of light from the light emitting elements of the lower deck. The display device provides a solution for uneven display cause by degradation of pixels.
    Type: Grant
    Filed: July 4, 2018
    Date of Patent: September 24, 2019
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Chang-Ting Lin, Wei-Chih Chang, Ying-Chieh Chen, Chung-Wen Lai, Chun-Chieh Huang, Wei-Li Wang, Po-Yi Lu, Jen-Jie Chen, I-Wei Wu
  • Publication number: 20190277843
    Abstract: Aluminum coated glass slides provide a novel glycan array platform. Specifically, aluminum coated glass slides increase sensitivity of fluorescent based assay methods. Additionally, aluminum coated glass slides allows for mass spectroscopic analysis of carbohydrates and provide a platform for examining activity of cellulases. The unique properties of ACG slides include: the metal oxide layer on the surface can be activated for grafting organic compounds such as modified oligosaccharides; the surface remains electrically conductive, and the grafted oligosaccharides can be simultaneously characterized by mass spectrometry and carbohydrate-binding assay; and the slides are more sensitive than transparent glass slides in binding analysis.
    Type: Application
    Filed: March 26, 2019
    Publication date: September 12, 2019
    Inventors: Chi-Huey WONG, Chung-YI WU, Susan Y. TSENG
  • Patent number: 10407673
    Abstract: A mutant of EndoS2 includes one or more mutations in the sequence of a wild-type EndoS2 (SEQ ID NO:1), wherein the one or more mutations are in a peptide region located within residues 133-143, residues 177-182, residues 184-189, residues 221-231, and/or residues 227-237, wherein the mutant of EndoS2 has a low hydrolyzing activity and a high tranglycosylation activity, as compared to those of the wild-type EndoS2. A method for preparing an engineered glycoprotein using the mutant of EndoS2 includes coupling an activated oligosaccharide to a glycoprotein acceptor. The activated oligosaccharide is a glycan oxazoline.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: September 10, 2019
    Assignees: CHO Pharma Inc., Academia Sinica
    Inventors: Nan-Horng Lin, Lin-Ya Huang, Sachin S Shivatare, Li-Tzu Chen, Chi-Huey Wong, Chung-Yi Wu, Ting Cheng
  • Publication number: 20190273145
    Abstract: Certain embodiments of a semiconductor device and a method of forming a semiconductor device comprise forming a high-k gate dielectric layer over a short channel semiconductor fin. A work function metal layer is formed over the high-k gate dielectric layer. A seamless metal fill layer is conformally formed over the work function metal layer.
    Type: Application
    Filed: March 1, 2018
    Publication date: September 5, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Hang CHIU, Chung-Chiang WU, Ching-Hwanq SU, Da-Yuan LEE, Ji-Cheng CHEN, Kuan-Ting LIU, Tai-Wei HWANG, Chung-Yi SU