Abstract: A multi-antenna system is provided. The multi-antenna system includes a first antenna, a second antenna, a tunable circuit, and a frequency-divisional circuit. The first antenna is utilized to implement signals of a first frequency band. The second antenna is utilized to implement signals of a second frequency band. The second antenna is different from the first antenna, and frequencies of the second frequency band are greater than frequencies of the first frequency band. The tunable circuit is utilized to switch the signals of the first frequency band. The frequency-divisional circuit is utilized to suppress harmonics caused by the tunable circuit.

Abstract: A communication device includes an antenna, a frequency dividing circuit, and at least one variable impedance circuit. The frequency dividing circuit has a common port coupled to the antenna and at least one output port. The frequency dividing circuit is configured to divide a frequency range received from the common port into a plurality of frequency sub-ranges and output at least one of the frequency sub-ranges respectively at the output port. Each variable impedance circuit is coupled between a corresponding output port of the frequency dividing circuit and a first reference voltage. Each variable impedance circuit provides a respective variable impedance value switched between different respective impedance values.

Abstract: The present disclosure provides an antenna structure, including a feed terminal, an intermediate grounding terminal, a tail grounding terminal, a conductive head section and a conductive intermediate section. The feed terminal is for connecting a feed signal. The intermediate grounding terminal is responsible for conducting to a ground plane via an intermediate impedance during a second operation mode, and ceasing conducting via the intermediate impedance during a first operation mode. The tail grounding terminal is for connecting the ground plane. The head section extends from the feed terminal to the intermediate grounding terminal along a loop. The intermediate section extends from the intermediate grounding terminal to the tail grounding terminal along the loop.

Abstract: A JBS diode includes a silicon substrate, a first P doped region, a metal layer, a second P doped region, and a first N doped region. The silicon substrate includes an upper surface. An NBL is provided in the bottom of the silicon substrate. An N well is provided between the upper surface and the NBL. The first P doped region is arranged in the N well, and extending downward from the upper surface. The metal layer covers the upper surface, and located on a side of the first P doped region. The second P doped region is arranged in the N well, extending downward from the upper surface, and located at the other side of the first P doped region. The first N doped region is arranged in the N well, extending downward from the upper surface, and located at the other side of the first P doped region.

Abstract: A matching circuit for an antenna of whatever type, includes a ground circuit and a feed circuit. The ground circuit connects a ground terminal of the antenna to a ground voltage, and provides an inductive impedance between the ground terminal and the ground voltage. The feed circuit connects a feed signal to a feed terminal of the antenna. The feed circuit is capable of switching between a first mode and a second mode for respectively providing a first equivalent impedance and a second equivalent impedance between the feed signal and the feed terminal. An associated method is also disclosed.

Abstract: A silicon controlled rectifier includes: a substrate; a N well and a P well positioned on a side of the substrate and contact with each other; a first N region and a first P region positioned on an upper surface of the N well and contact with each other; a second N region and a second P region positioned on an upper surface of the P well and contact with each other; a first oxide isolation region isolating the first P region and the second N region; a second oxide isolation region isolating the second N region and the second P region; an anode terminal coupled with the first N region and the first P region; and a cathode terminal coupled with the second N region and the second P region. The first P region has a doping concentration less than 80% of that of the second P region.

Abstract: A semiconductor structure and a manufacturing method for the same are provided. The semiconductor structure includes a well region, a dielectric structure, a first doped layer, a second doped layer and a first doped region. The dielectric structure is on the well region. The dielectric structure has a first dielectric sidewall and a second dielectric sidewall opposite to each other. The dielectric structure includes a first dielectric portion and a second dielectric portion, between the first dielectric sidewall and the second dielectric sidewall. The first doped layer is on the well region between the first dielectric portion and the second dielectric portion. The second doped layer is on the first doped layer. The first doped region is in the well region on the first dielectric sidewall.

Abstract: A method of manufacturing a junction-field-effect-transistor (JFET) device, the method includes the steps of providing a substrate of a first-type impurity; forming a first well region of a second-type impurity in the substrate; forming a second well region and a third well region of the first-type impurity separated from each other in the first well region; forming a fourth well region of the first-type impurity between the second well region and the third well region; forming a first diffused region of the second-type impurity between the second well region and the fourth well region; forming a second diffused region of the second-type impurity between the third well region and the fourth well region; forming a pair of first doped regions of the second-type impurity in the first well region, and a pair of second doped regions of the first-type impurity in the second well region and the third well region respectively; forming a third doped region of the second-type impurity in the first well region between t

Abstract: A junction-field-effect-transistor (JFET) device includes a substrate of a first-type impurity, a first well region of a second-type impurity in the substrate, a pair of second well regions of the first-type impurity separated from each other in the first well region, a third well region of the first-type impurity between the pair of second well regions, a first diffused region of the second-type impurity between the third well region and one of the second well regions, and a second diffused region of the second-type impurity between the third well region and the other one of the second well regions.

Abstract: A semiconductor structure and a manufacturing method for the same are provided. The semiconductor structure includes a well region, a dielectric structure, a first doped layer, a second doped layer and a first doped region. The dielectric structure is on the well region. The dielectric structure has a first dielectric sidewall and a second dielectric sidewall opposite to each other. The dielectric structure includes a first dielectric portion and a second dielectric portion, between the first dielectric sidewall and the second dielectric sidewall. The first doped layer is on the well region between the first dielectric portion and the second dielectric portion. The second doped layer is on the first doped layer. The first doped region is in the well region on the first dielectric sidewall.

Abstract: A Schottky diode comprises an ohmic layer that can serve as a cathode and a metal layer that can serve as an anode, and a drift channel formed of semiconductor material that extends between the ohmic and metal layers. The drift channel includes a heavily doped region adjacent to the ohmic contact layer. The drift channel forms a Schottky barrier with the metal layer. A pinch-off mechanism is provided for pinching off the drift channel while the Schottky diode is reverse-biased. As a result, the level of saturation or leakage current between the metal layer and the ohmic contact layer under a reverse bias condition of the Schottky diode is reduced.

Abstract: An electronic device with multiple antennas includes a first antenna, a first proximity sensor, a second antenna, a second proximity sensor, a detection module, a control module and a processor. The detection module that detects a first approach signal from the first proximity sensor and a second approach signal from the second proximity sensor. The control module that initiates the second antenna to receive signals if the strength of the first approach signal is stronger then the strength of the second approach signal or initiates the first antenna to receive signals if the strength of the second approach signal is stronger then the strength of the first approach signal. The processor that controls the detection module, the comparison module and the control module.

Abstract: A Schottky diode comprises an ohmic layer that can serve as a cathode and a metal layer that can serve as an anode, and a drift channel formed of semiconductor material that extends between the ohmic and metal layers. The drift channel includes a heavily doped region adjacent to the ohmic contact layer. The drift channel forms a Schottky barrier with the metal layer. A pinch-off mechanism is provided for pinching off the drift channel while the Schottky diode is reverse-biased. As a result, the level of saturation or leakage current between the metal layer and the ohmic contact layer under a reverse bias condition of the Schottky diode is reduced.

Abstract: A data cable structure includes an interface unit for connecting to electronic devices, a cable unit connected to the interface unit, and a radiation reducing unit mounted on the cable unit. The radiation reducing unit is a winding surrounding a part of the cable unit and cooperating with the cable unit to form a choke structure to prevent electromagnetic radiation generated by the electronic devices from being emitted from the cable unit.

Abstract: A junction-field-effect-transistor (JFET) device includes a substrate of a first-type impurity, a first well region of a second-type impurity in the substrate, a pair of second well regions of the first-type impurity separated from each other in the first well region, a third well region of the first-type impurity between the pair of second well regions, a first diffused region of the second-type impurity between the third well region and one of the second well regions, and a second diffused region of the second-type impurity between the third well region and the other one of the second well regions.

Abstract: A multiband antenna includes a first antenna unit for receiving/sending wireless signals having higher frequencies and a second antenna unit for receiving/sending wireless signals having lower frequencies than those frequencies received/sent by the first antenna unit. The first antenna unit includes a first main portion, a first resonating portion and a first connecting portion connected in order and positioned in a same plane. The second antenna unit includes a second connecting portion, a second resonating portion and a second main portion connected in order. The second connecting portion is coplanar with the first connecting portion, the second resonating portion is perpendicular to the second connecting portion, and the second main portion is perpendicular to both the first connecting portion and the second connecting portion.

Abstract: A data cable structure includes an interface unit for connecting to electronic devices, a cable unit connected to the interface unit, and a radiation reducing unit mounted on the cable unit. The radiation reducing unit cooperates with the cable unit to form a choke structure to prevent electromagnetic radiation generated by the electronic devices from being emitted from the cable unit.

Abstract: A multiband antenna includes a first antenna unit for receiving/sending wireless signals having higher frequencies and a second antenna unit for receiving/sending wireless signals having lower frequencies than those frequencies received/sent by the first antenna unit. The first antenna unit includes a first main portion, a first resonating portion and a first connecting portion connected in order and positioned in a same plane. The second antenna unit includes a second connecting portion, a second resonating portion and a second main portion connected in order. The second connecting portion is coplanar with the first connecting portion, the second resonating portion is perpendicular to the second connecting portion, and the second main portion is perpendicular to both the first connecting portion and the second connecting portion.