Abstract: An integrated circuit includes a cell that is between a substrate and a supply conductive line and that includes a source region, a contact conductive line, a power conductive line, and a power via. The contact conductive line extends from the source region. The power conductive line is coupled to the contact conductive line. The power via interconnects the supply conductive line and the power conductive line.

Abstract: A structure includes a first via and a first conductive line embedded in a first dielectric layer and spaced apart from each other by the first dielectric layer. A first metal pattern disposed on the first via and embedded in a second dielectric layer. A first conductive via disposed on the first conductive line and embedded in the second dielectric layer. The first metal pattern and the first conductive via are spaced apart from each other and are located on a first horizontal level, and the first metal pattern has an open ring shape. A second via disposed on the first metal pattern and embedded in a third dielectric layer. An inductor structure including the first via, the first metal pattern, and the second via.

Abstract: The present disclosure describes an example method for routing a standard cell with multiple pins. The method can include modifying a dimension of a pin of the standard cell, where the pin is spaced at an increased distance from a boundary of the standard cell than an original position of the pin. The method also includes routing an interconnect from the pin to a via placed on a pin track located between the pin and the boundary and inserting a keep out area between the interconnect and a pin from an adjacent standard cell. The method further includes verifying that the keep out area separates the interconnect from the pin from the adjacent standard cell by at least a predetermined distance.

Abstract: A manufacturing method of a semiconductor package is provided. The method includes: providing an initial rigid-flexible substrate, wherein the initial rigid-flexible substrate includes rigid structures and a flexible core laterally penetrating through the rigid structures, and further includes a supporting frame connected to the rigid structures; bonding a package structure onto the initial rigid-flexible substrate, wherein the package structure includes semiconductor dies and an encapsulant laterally surrounding the semiconductor dies; and removing the supporting frame.

Abstract: A light-emitting device includes a substrate, multiple light-emitting units that are disposed on the substrate, that are spaced apart by an isolation trench and that are and electrically interconnected by an interconnecting structure, and an insulating layer with thickness of 200 nm to 450 nm. A potential difference between adjacent two light-emitting units not in direct electrical connection is at least two times forward voltage of each of the light-emitting units. Each light-emitting unit includes a light-emitting stack and a light-transmissible current spreading layer. The insulating layer covers the light-transmissible current spreading layers and at least a part of the light-emitting stacks.

Abstract: An integrated circuit includes a cell that is between a substrate and a supply conductive line and that includes a source region, a contact conductive line, a power conductive line, and a power via. The contact conductive line extends from the source region. The power conductive line is coupled to the contact conductive line. The power via interconnects the supply conductive line and the power conductive line.

Abstract: A chip package structure includes an interposer structure that contains a package-side redistribution structure, an interposer core assembly, and a die-side redistribution structure. The interposer core assembly includes at least one silicon substrate interposer, and each of the at least one silicon substrate interposer includes a respective silicon substrate, a respective set of through-silicon via (TSV) structures vertically extending through the respective silicon substrate, a respective set of interconnect-level dielectric layers embedding a respective set of metal interconnect structures, and a respective set of metal bonding structures that are electrically connected to the die-side redistribution structure. The chip package structure includes at least two semiconductor dies that are attached to the die-side redistribution structure, and an epoxy molding compound (EMC) multi-die frame that laterally encloses the at least two semiconductor dies.

Abstract: A structure includes a first via and a first conductive line embedded in a first dielectric layer and spaced apart from each other by the first dielectric layer. A first metal pattern disposed on the first via and embedded in a second dielectric layer. A first conductive via disposed on the first conductive line and embedded in the second dielectric layer. The first metal pattern and the first conductive via are spaced apart from each other and are located on a first horizontal level, and the first metal pattern has an open ring shape. A second via disposed on the first metal pattern and embedded in a third dielectric layer. An inductor structure including the first via, the first metal pattern, and the second via.

Abstract: The present disclosure describes an example method for routing a standard cell with multiple pins. The method can include modifying a dimension of a pin of the standard cell, where the pin is spaced at an increased distance from a boundary of the standard cell than an original position of the pin. The method also includes routing an interconnect from the pin to a via placed on a pin track located between the pin and the boundary and inserting a keep out area between the interconnect and a pin from an adjacent standard cell. The method further includes verifying that the keep out area separates the interconnect from the pin from the adjacent standard cell by at least a predetermined distance.

Abstract: A semiconductor device includes a substrate; a memory array over the substrate, the memory array including first magnetic tunnel junctions (MTJs), where the first MTJs are in a first dielectric layer over the substrate; and a resistor circuit over the substrate, the resistor circuit including second MTJs, where the second MTJs are in the first dielectric layer.

Abstract: A manufacturing method of a semiconductor package is provided. The method includes: providing an initial rigid-flexible substrate, wherein the initial rigid-flexible substrate includes rigid structures and a flexible core laterally penetrating through the rigid structures, and further includes a supporting frame connected to the rigid structures; bonding a package structure onto the initial rigid-flexible substrate, wherein the package structure includes semiconductor dies and an encapsulant laterally surrounding the semiconductor dies; and removing the supporting frame.

Abstract: A method for detecting one or more objects adjacent to a vehicle includes capturing a image of an object adjacent to the vehicle; determining a driving area in the image; cutting the driving area to form an identification window; selecting an identification area in the identification window; accessing a plurality of object image data in a memory to compare the plurality of object image data with the identification area; and identifying a specific object in the identification area by the processor.

Abstract: A method for detecting one or more objects adjacent to a vehicle includes capturing a image of an object adjacent to the vehicle; determining a driving area in the image; cutting the driving area to form an identification window; selecting an identification area in the identification window; accessing a plurality of object image data in a memory to compare the plurality of object image data with the identification area; and identifying a specific object in the identification area by the processor.

Abstract: An automatic following system includes a target apparatus and a following apparatus. The target apparatus includes a first magnetometer, a first processing unit, and a first wireless communications unit. The first magnetometer keeps transmitting geomagnetic azimuth information. The first processing unit receives the geomagnetic azimuth information and outputs first direction angle information. The first wireless communications unit transmits a wireless signal comprising the first direction angle information. The following apparatus includes a second magnetometer, a second processing unit, a second wireless communications unit, and a control unit. The second magnetometer keeps transmitting the geomagnetic azimuth information. The second wireless communications unit receives the wireless signal. The second processing unit generates second direction angle information, and calculates following steering angle information according to the first direction angle information and the second direction angle information.

Abstract: An in-vehicle driving image map data establishment system is provided, and includes an image capture apparatus, a vehicle speed unit, and a control apparatus. The image capture apparatus continuously captures and outputs a plurality of outside-vehicle images. The vehicle speed unit continuously detects and outputs real-time vehicle speed information.

Abstract: An in-vehicle driving image map data establishment system is provided, and includes an image capture apparatus, a vehicle speed unit, and a control apparatus. The image capture apparatus continuously captures and outputs a plurality of outside-vehicle images. The vehicle speed unit continuously detects and outputs real-time vehicle speed information.

Abstract: A countertop roaster is configured for stacked or apparatus for multilevel cooking of food. The roaster has a first housing having a first sidewall surrounding a first cooking cavity and a a second housing having a bottom surface extending to a second sidewall surrounding a second cooking cavity. The roaster is configured for use with the first housing alone, or in a stacked configuration with a second housing atop the first housing where different foods can be cooked respectively in said first cooking cavity and said second cooking cavity with heat communicated from an electric heating element in said first housing.

Abstract: A collapsible food dehydrator having a cabinet formed of a pair of sidewalls removably engaged using fasteners with a top wall, a bottom wall, and a fan housing. The fasteners impart a tension to the removable engagement to strengthen the cabinet. Shelves are slidably engaged with a plurality of pairs of tracks removably engaged on opposing sides of an interior cavity.