Patents by Inventor Chung-Yun Chou
Chung-Yun Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10567017Abstract: The present invention provides a receiver having an input node, a blocker detector, a translational filter and a low-noise amplifier. The input node is arranged to receive an input signal. The blocker detector is configured to detect if the input signal has a blocker to generate a detection result. The translational filter is configured to filter out an output-of-band blocker of the input signal to generate a filtered input signal at the input node or not filter output the output-of-band blocker of the input signal according to the detection result. The low-noise amplifier is configured to receive the filtered input signal or the input signal to generate an amplified input signal.Type: GrantFiled: May 16, 2019Date of Patent: February 18, 2020Assignee: MEDIATEK INC.Inventors: Zong-You Li, Chi-Yao Yu, Chung-Yun Chou, Yen-Horng Chen
-
Publication number: 20190386692Abstract: The present invention provides a receiver having an input node, a blocker detector, a translational filter and a low-noise amplifier. The input node is arranged to receive an input signal. The blocker detector is configured to detect if the input signal has a blocker to generate a detection result. The translational filter is configured to filter out an output-of-band blocker of the input signal to generate a filtered input signal at the input node or not filter output the output-of-band blocker of the input signal according to the detection result. The low-noise amplifier is configured to receive the filtered input signal or the input signal to generate an amplified input signal.Type: ApplicationFiled: May 16, 2019Publication date: December 19, 2019Inventors: Zong-You Li, Chi-Yao Yu, Chung-Yun Chou, Yen-Horng Chen
-
Patent number: 9641139Abstract: An amplifier applicable to an intra-band non-contiguous carrier aggregation (NCCA) band includes a first amplifier circuit and a second amplifier circuit. The NCCA band includes at least a primary component carrier (PCC) channel and a secondary component carrier (SCC) channel not adjacent to each other. The first amplifier circuit receives a first input signal, and generates a first output signal for undergoing down-conversion of one of the PCC channel and the SCC channel. The second amplifier circuit receives at least one second input signal, and generates a second output signal for undergoing down-conversion of another of the PCC channel and the SCC channel. The at least one second input signal received by the second amplifier circuit is provided by the first amplifier circuit according to the first input signal.Type: GrantFiled: October 26, 2015Date of Patent: May 2, 2017Assignee: MEDIATEK INC.Inventors: Chi-Yao Yu, Chung-Yun Chou
-
Publication number: 20160142027Abstract: An amplifier applicable to an intra-band non-contiguous carrier aggregation (NCCA) band includes a first amplifier circuit and a second amplifier circuit. The NCCA band includes at least a primary component carrier (PCC) channel and a secondary component carrier (SCC) channel not adjacent to each other. The first amplifier circuit receives a first input signal, and generates a first output signal for undergoing down-conversion of one of the PCC channel and the SCC channel. The second amplifier circuit receives at least one second input signal, and generates a second output signal for undergoing down-conversion of another of the PCC channel and the SCC channel. The at least one second input signal received by the second amplifier circuit is provided by the first amplifier circuit according to the first input signal.Type: ApplicationFiled: October 26, 2015Publication date: May 19, 2016Inventors: Chi-Yao Yu, Chung-Yun Chou
-
Patent number: 8836447Abstract: A tuner includes a plurality of paths, and at least one of the paths includes a front-end filter circuit, an amplifier, and a trace filter. The trace filter includes a varactor and an inductor, which are coupled to an output end of the amplifier. Further, the amplifier and the varactor of the tuner are packed in a complementary metal-oxide semiconductor (CMOS) chip.Type: GrantFiled: July 28, 2010Date of Patent: September 16, 2014Assignee: MStar Semiconductor, Inc.Inventors: Fucheng Wang, Yi Lu, Chung-Yun Chou
-
Publication number: 20140146920Abstract: A mixer with IQ gain-phase calibration circuit is provided, including an I-path input stage, a Q-path input stage, an I-path switching stage, a Q-path switching stage, and an output stage, wherein the output stage further includes a phase calibration module, and a gain calibration module. The I-path and Q-path input stages are to convert the input voltage signal to a current signal, and the I-path and Q-path switching stages are to perform computation on input signal from the input stages with local oscillation signal. The signals from the switching stages are then passed through the phase calibration module for phase calibration and then through the gain calibration module for gain calibration before outputting.Type: ApplicationFiled: November 27, 2012Publication date: May 29, 2014Applicant: KEYSTONE SEMICONDUCTOR CORP.Inventors: Chung-Yun Chou, Chao-Tung Yang
-
Publication number: 20140117974Abstract: An RSSI circuit with low voltage and wide detectable power range is provided, including a plurality of amplifiers connected in a cascade manner; a plurality of rectifiers, each of the plurality of rectifier having an input connected to an output of each of the plurality of amplifiers in turn; and a selector, connected to an output of each of the plurality of rectifiers for selecting an output among the outputs from the plurality of rectifiers. By using selector to select an output among outputs of the rectifiers, the RSSI circuit of the present invention can detect a wider power range with same voltage range because each stage can utilize the full voltage range.Type: ApplicationFiled: October 30, 2012Publication date: May 1, 2014Applicant: KEYSTONE SEMICONDUCTOR CORP.Inventors: Chung-Yun Chou, Chao-Tung Yang
-
Publication number: 20120183109Abstract: A broadcast receiver with image rejection is proposed. The broadcast receiver includes a radio frequency processing unit and a baseband processing unit. The radio frequency processing unit receives a first input signal and a second input signal, amplifies the first input signal and the second input signal, down-converts the second input signal, and generating a first signal and a down-converted second signal. Besides, the baseband processing unit receives one of the first signal and the down-converted second signal, filters the received signal thereof, wherein the baseband processing unit comprises an anti-aliasing filter unit which attenuates adjacent channel interference of the received signal, and when the received signal is the down-converted second signal, the anti-aliasing filter unit attenuates a portion of an image signal in the received signal.Type: ApplicationFiled: January 14, 2011Publication date: July 19, 2012Applicant: KeyStone Semiconductor Corp.Inventors: Chao-Tung Yang, Chung-Yun Chou
-
Patent number: 7956666Abstract: A mixer includes a transduction circuit, a first and a second switch circuit, and a first and a second load circuit. The transconductor circuit is for generating a differential current signal according to a differential voltage signal. The first switch circuit and the first load circuit are connected in series, and the first switch circuit is used to regulate the differential current signal in response to a first oscillator signal. The second switch circuit and a second load circuit are connected in series, and the second switch circuit is used to regulate the differential current signal in response to a second oscillator signal. The first load circuit and the second load circuit are connected at a common node to reduce harmonic interferences.Type: GrantFiled: October 26, 2009Date of Patent: June 7, 2011Assignee: MStar Semiconductor, Inc.Inventors: Chung-Yun Chou, Chao-Tung Yang
-
Publication number: 20110051014Abstract: A tuner includes a plurality of paths, and at least one of the paths includes a front-end filter circuit, an amplifier, and a trace filter. The trace filter includes a varactor and an inductor, which are coupled to an output end of the amplifier. Further, the amplifier and the varactor of the tuner are packed in a complementary metal-oxide semiconductor (CMOS) chip.Type: ApplicationFiled: July 28, 2010Publication date: March 3, 2011Applicant: MStar Semiconductor, Inc.Inventors: Fucheng Wang, Yi Lu, Chung-Yun Chou
-
Publication number: 20100219875Abstract: A mixer includes a transduction circuit, a first and a second switch circuit, and a first and a second load circuit. The transconductor circuit is for generating a differential current signal according to a differential voltage signal. The first switch circuit and the first load circuit are connected in series, and the first switch circuit is used to regulate the differential current signal in response to a first oscillator signal. The second switch circuit and a second load circuit are connected in series, and the second switch circuit is used to regulate the differential current signal in response to a second oscillator signal. The first load circuit and the second load circuit are connected at a common node to reduce harmonic interferences.Type: ApplicationFiled: October 26, 2009Publication date: September 2, 2010Applicant: MStar Semiconductor, Inc.Inventors: CHUNG-YUN CHOU, Chao-Tung Yang