Abstract: The present invention provides a memory controller including a plurality of channels. A first channel of the plurality of channels includes a first transmitter, a first pull-up variable resistor and a first pull-down variable resistor, wherein the first transmitter is configured to generate a first data signal to a memory module, the first pull-up variable resistor is coupled between a supply voltage and an output terminal of the first transmitter, and the first pull-down variable resistor is coupled to the output terminal of the first transmitter. The control circuit is coupled to the plurality of channels, and is configured to control the first pull-up variable resistor and/or the first pull-down variable resistor according to a reference voltage used by the memory module.

Abstract: The present invention provides a circuit including a reference voltage generator and a plurality of receivers, wherein the reference voltage generator is configured to generate a reference voltage, and each of the receivers is configured to receive the reference voltage and a corresponding input signal to generate a corresponding output signal. In addition, for at least a specific receiver of the plurality of receivers, the specific receiver comprises at least one amplifying stage, the amplifying stage comprises a first input terminal configured to receive the corresponding input signal, a second input terminal configured to receive the reference voltage, a first output terminal configured to generate a first signal, and a second output terminal configured to generate a second signal; and the specific receiver further comprises a first feedback circuit coupled between the first output terminal and the second input terminal.

Abstract: The present invention provides a memory controller including a plurality of channels. A first channel of the plurality of channels includes a first transmitter, a first pull-up variable resistor and a first pull-down variable resistor, wherein the first transmitter is configured to generate a first data signal to a memory module, the first pull-up variable resistor is coupled between a supply voltage and an output terminal of the first transmitter, and the first pull-down variable resistor is coupled to the output terminal of the first transmitter. The control circuit is coupled to the plurality of channels, and is configured to control the first pull-up variable resistor and/or the first pull-down variable resistor according to a reference voltage used by the memory module.

Abstract: The present invention provides a circuit including a reference voltage generator and a plurality of receivers, wherein the reference voltage generator is configured to generate a reference voltage, and each of the receivers is configured to receive the reference voltage and a corresponding input signal to generate a corresponding output signal. In addition, for at least a specific receiver of the plurality of receivers, the specific receiver comprises at least one amplifying stage, the amplifying stage comprises a first input terminal configured to receive the corresponding input signal, a second input terminal configured to receive the reference voltage, a first output terminal configured to generate a first signal, and a second output terminal configured to generate a second signal; and the specific receiver further comprises a first feedback circuit coupled between the first output terminal and the second input terminal.

Abstract: The present invention provides a memory module wherein the memory module includes a plurality of memory devices having at least a first memory device and a second memory device, and the first memory device comprises a first termination resistor, and the second memory device comprises a second termination resistor. In the operations of the memory module, when the first memory device is accessed by a memory controller and the second memory device is not accessed by the memory controller, the first termination resistor is controlled to not provide impedance matching for the first memory device, and the second termination resistor is controlled to provide impedance matching for the second memory device.

Abstract: The present invention provides a memory module wherein the memory module includes a plurality of memory devices having at least a first memory device and a second memory device, and the first memory device comprises a first termination resistor, and the second memory device comprises a second termination resistor. In the operations of the memory module, when the first memory device is accessed by a memory controller and the second memory device is not accessed by the memory controller, the first termination resistor is controlled to not provide impedance matching for the first memory device, and the second termination resistor is controlled to provide impedance matching for the second memory device.

Abstract: A package on package (PoP) structure is disclosed. The PoP structure comprises a top package and a bottom package disposed thereunder. The top package comprises a first substrate and a first die mounted onto the first substrate. At least one electrically floating pad is disposed on a lower surface of the first substrate. The bottom package comprises a second substrate and a second die mounted onto the second substrate. An upper surface of the second die is in thermal contact with the electrically floating pad.

Abstract: A package on package (PoP) structure is disclosed. The PoP structure includes a top package and a bottom package disposed thereunder. The top package includes a first substrate and a first die mounted onto the first substrate. The first substrate has a thermal conductivity which is more than 70 W/(m×K). The bottom package includes a second substrate and a second die mounted onto the second substrate. An upper surface of the second die is in thermal contact with a lower surface of the first substrate.

Abstract: The present invention provide a heat dissipation structure on the active surface of the die to increase the performance of the heat conduction in longitude direction of the semiconductor package device, so that the heat dissipating performance can be improved when the semiconductor package device is associated with the exterior heat dissipation mechanism.

Abstract: The present invention provide a heat dissipation structure on the active surface of the die to increase the performance of the heat conduction in longitude direction of the semiconductor package device, so that the heat dissipating performance can be improved when the semiconductor package device is associated with the exterior heat dissipation mechanism.