Abstract: A system, e.g., a system on a chip (SoC) includes a first domain including a first processor configured to boot the system; a second domain including a processing subsystem having a second processor; and isolation circuitry between the first domain and the second domain During boot-up of the system, the first processor provides code to the second domain. When the code is executed by the second processor, it configures the processing subsystem as either a safety domain or as a general-purpose processing domain. The safety domain may an external safety domain or an internal safety domain.

Abstract: An example includes a circuit including a first AND gate including a first input terminal, a second input terminal, and an output terminal, a second AND gate including a first input terminal, a second input terminal, and an output terminal, and a third AND gate including a first input terminal, a second input terminal, and an output terminal. The circuit also includes an OR gate including a first input terminal coupled to the output terminal of the first AND gate, a second input terminal coupled to the output terminal of the second AND gate, a third input terminal coupled to the output terminal of the third AND gate, and an output terminal.

Abstract: A system on a chip (SoC) includes a first domain comprising a first processor configured to boot the SoC, and a first debug subsystem, a second domain comprising a second processor, the second domain configurable as either a safety domain or a general-purpose processing domain, and isolation circuitry between the first domain and the second domain. During boot-up of the SoC, the first processor provides code to the second domain which, when executed by the second processor, configures the second domain as either a safety domain or as a general-purpose processing domain.

Abstract: Embodiments of this application provide a recovery method for a terminal device startup failure and a terminal device. The method includes: determining that a failure indication event occurs in a startup process, where the failure indication event is used to indicate a startup failure; determining at least one recovery policy based on a type of the failure indication event and/or a cause of the failure indication event; and performing startup recovery based on the at least one recovery policy.

Abstract: Disclosed are an optical anti-counterfeiting element and a manufacturing method thereof, and an anti-counterfeiting product. The optical anti-counterfeiting element includes a micro lens array layer and a micro graphic-text array layer; the micro graphic-text array layer includes a micro graphic-text area and a micro graphic-text background area; surface undulation shapes of the micro graphic-text area and the micro graphic-text background area are different; and/or a height difference is set for the micro graphic-text area and the micro graphic-text background area, so that a graphic-text area and/or a graphic-text background area imaged by the micro lens array layer and the micro graphic-text array layer under sampling synthesis have different visual features. In particular, with a change in an observation angle, a graphic-text and/or a graphic-text background changes from one color to another color, thereby improving an anti-counterfeiting capability.

Abstract: A method includes transmitting first data with a first priority through a first dedicated interface on a transmit side of a PCIe system. The method also includes transmitting second data with a second priority through a second dedicated interface on the transmit side of the PCIe system. The method includes transmitting the first data and the second data to a receive side of the PCIe system using two or more virtual channels over a PCIe link, where the first data uses a first virtual channel and the second data uses a second virtual channel.

Abstract: A method includes transmitting first data with a first priority through a first dedicated interface on a transmit side of a PCIe system. The method also includes transmitting second data with a second priority through a second dedicated interface on the transmit side of the PCIe system. The method includes transmitting the first data and the second data to a receive side of the PCIe system using two or more virtual channels over a PCIe link, where the first data uses a first virtual channel and the second data uses a second virtual channel.

Abstract: The present application discloses a positive electrode active material including a lithium nickel cobalt manganese oxide, the molar content of nickel in the lithium nickel cobalt manganese oxide accounts for 60%-90% of the total molar content of nickel, cobalt and manganese, and the lithium nickel cobalt manganese oxide has a layered crystal structure of a space group R 3m; a transition metal layer of the lithium nickel cobalt manganese oxide includes a doping element, and the local mass concentration of the doping element in particles of the positive electrode active material has a relative deviation of 20% or less; and in a differential scanning calorimetry spectrum of the positive electrode active material in a 78% delithiation state, an initial exothermic temperature of a main exothermic peak is 200° C. or more, and an integral area of the main exothermic peak is 100 J/g or less.

Abstract: This application provides a lithium-ion battery and an apparatus. The lithium-ion battery includes an electrode assembly and an electrolyte. The electrode assembly includes a positive electrode plate, a negative electrode plate, and a separator. A positive active material of the positive electrode plate includes Lix1Coy1M1-y1O2-z1Qz1, where 0.5?x1?1.2, 0.8?y1?1.0, 0?z1?0.1, M is selected from one or more of Al, Ti, Zr, Y, and Mg, and Q is selected from one or more of F, Cl, and S. The electrolyte contains an additive A that is a polynitrile six-membered nitrogen-heterocyclic compound with a relatively low oxidation potential. The lithium-ion battery has superb cycle performance and storage performance, especially under high-temperature and high-voltage conditions.

Abstract: The present application discloses a positive electrode active material including a lithium nickel cobalt manganese oxide, the molar content of nickel in the lithium nickel cobalt manganese oxide accounts for 60%-90% of the total molar content of nickel, cobalt and manganese, and the lithium nickel cobalt manganese oxide has a layered crystal structure of a space group R 3m; a transition metal layer of the lithium nickel cobalt manganese oxide includes a doping element, and the local mass concentration of the doping element in particles of the positive electrode active material has a relative deviation of 20% or less; and in a differential scanning calorimetry spectrum of the positive electrode active material in a 78% delithiation state, an initial exothermic temperature of a main exothermic peak is 200° C. or more, and an integral area of the main exothermic peak is 100 J/g or less.

Abstract: A system on a chip (SoC) includes a first domain comprising a first processor configured to boot the SoC, and a first debug subsystem, a second domain comprising a second processor, the second domain configurable as either a safety domain or a general-purpose processing domain, and isolation circuitry between the first domain and the second domain. During boot-up of the SoC, the first processor provides code to the second domain which, when executed by the second processor, configures the second domain as either a safety domain or as a general-purpose processing domain.

Abstract: A circuit device is provided and includes a first power domain comprising a universal serial bus (USB) subsystem and/or a memory controller subsystem. The first power domain is configured to isolate the USB subsystem and/or the memory controller subsystem from a power-on-reset signal asserted during a low power mode.

Abstract: The present application discloses a positive electrode active material including a lithium nickel cobalt manganese oxide, the molar content of nickel in the lithium nickel cobalt manganese oxide accounts for 60%-90% of the total molar content of nickel, cobalt and manganese, and the lithium nickel cobalt manganese oxide has a layered crystal structure of a space group R 3m; a transition metal layer of the lithium nickel cobalt manganese oxide includes a doping element, and the local mass concentration of the doping element in particles of the positive electrode active material has a relative deviation of 20% or less; and in a differential scanning calorimetry spectrum of the positive electrode active material in a 78% delithiation state, an initial exothermic temperature of a main exothermic peak is 200° C. or more, and an integral area of the main exothermic peak is 100 J/g or less.

Abstract: An address space field is used in conjunction with a normal address field to allow indication of an address space for the particular address value. In one instance, one address space value is used to indicate the bypassing of the address translation used between address spaces. A different address space value is designated for conventional operation, where address translations are performed. Other address space values are used to designate different transformations of the address values or the data. This technique provides a simplified format for handling address values and the like between different devices having different address spaces, simplifying overall computer system design and operation.

Abstract: A method includes transmitting first data with a first priority through a first dedicated interface on a transmit side of a PCIe system. The method also includes transmitting second data with a second priority through a second dedicated interface on the transmit side of the PCIe system. The method includes transmitting the first data and the second data to a receive side of the PCIe system using two or more virtual channels over a PCIe link, where the first data uses a first virtual channel and the second data uses a second virtual channel.

Abstract: This application discloses a positive electrode active material and a preparation method thereof, a positive electrode plate, a lithium-ion secondary battery, and a battery module, battery pack, and apparatus containing such lithium-ion secondary battery. The positive electrode active material includes bulk particles and an element M1-containing oxide coating layer applied on an exterior surface of each of the bulk particles. The bulk particle includes a nickel-containing lithium composite oxide. Bulk phases of the bulk particles are uniformly doped with element M2. A surface layer of the bulk particle is an exterior doped layer doped with element M3. Element M1 and element M3 are each independently selected from one or more of Mg, Al, Ca, Ce, Ti, Zr, Zn, Y, and B, and element M2 includes one or more of Si, Ti, Cr, Mo, V, Ge, Se, Zr, Nb, Ru, Rh, Pd, Sb, Te, Ce, and W.

Abstract: The present application provides a lithium-ion battery and an apparatus, the lithium-ion battery includes an electrode assembly and an electrolyte. The electrode assembly includes a positive electrode sheet, a negative electrode sheet and a separation film. The positive active material in the positive electrode sheet includes Lix1Coy1M1-y1O2-z1Qz1, 0.5?x1?1.2, 0.8?y1<1.0, 0?z1?0.1, and M is selected from one of Al, Ti, Zr, Y, and Mg, and Q is selected from one or more of F, Cl, and S. The electrolyte contains an additive A and an additive B, the additive A is a polynitrile six-membered nitrogen-heterocyclic compound with a relatively low oxidation potential, and the additive B is an aliphatic dinitrile or polynitrile compound with a relatively high oxidation potential. The lithium-ion battery of the present application has superb cycle performance and storage performance, especially under high-temperature and high-voltage conditions.

Abstract: Disclosed embodiments include an electronic system with a power on reset (POR) circuit. The POR circuit includes first voltage detection circuitry to perform a first detection on a supply voltage and to output a first control signal in response to the first detection, second voltage detection circuitry to perform a second detection on the supply voltage and to output a second control signal in response to the second detection, and third voltage detection circuitry to perform a third detection on the supply voltage and to output at least one third control signal in response to the third detection. The POR circuit further has sequencing circuitry with a first input to receive the at least one third control signal and to output a reset signal in response to the at least one third control signal.

Abstract: A system on a chip (SOC) is configured to support multiple time domains within a time-sensitive networking (TSN) environment. TSN extends Ethernet networks to support a deterministic and high-availability communication on Layer 2 (data link layer of open system interconnect “OSI” model) for time coordinated capabilities such as industrial automation and control applications. Processors in a system may have an application time domain separate from the communication time domain. In addition, each type time domain may also have multiple potential time masters to drive synchronization for fault tolerance. The SoC supports multiple time domains driven by different time masters and graceful time master switching. Timing masters may be switched at run-time in case of a failure in the system. Software drives the SoC to establish communication paths through a sync router to facilitate communication between time providers and time consumers. Multiple time sources are supported.

Abstract: The disclosure provides an optical anti-counterfeiting element (1) and an optical anti-counterfeiting product (0), which belong to the technical field of optical anti-counterfeiting. The optical anti-counterfeiting element includes: a substrate (2) having a first surface (21) and a second surface (22) opposite each other, at least a partial region of the substrate is transparent; and a first transflective coating (31), a dielectric layer (32) and a second transflective coating (33) which are sequentially deposited on the first surface, wherein a ratio of a refractive index to an extinction coefficient of the first transflective coating is different from a ratio of a refractive index to an extinction coefficient of the second transflective coating. When observed from the first surface, the optical anti-counterfeiting element appears in a relatively bright first color; when observed from the second surface, the optical anti-counterfeiting element appears in a relatively bright second color.