Abstract: A method for fabricating quantum wells by using indium gallium nitride (InGaN) semiconductor material includes fabricating a potential well on a layered group III-V nitride structure at a first predetermined temperature in a reactor chamber by injecting into the reactor chamber an In precursor gas and a Ga precursor gas. The method further includes, subsequent to the fabrication of the potential well, terminating the Ga precursor gas, maintaining a flow of the In precursor gas, and increasing the temperature in the reactor chamber to a second predetermined temperature while adjusting the In precursor gas flow rate from a first to a second flow rate. In addition, the method includes annealing and stabilizing the potential well at the second predetermined temperature while maintaining the second flow rate. The method also includes fabricating a potential barrier above the potential well at the second predetermined temperature while resuming the Ga precursor gas.

Abstract: One embodiment of the present invention provides a method for fabricating a group III-V p-type nitride structure. The method comprises growing a first layer of p-type group III-V material with a first acceptor density in a first growing environment. The method further comprises growing a second layer of p-type group III-V material, which is thicker than the first layer and which has a second acceptor density, on top of the first layer in a second growing environment. In addition, the method comprises growing a third layer of p-type group III-V material, which is thinner than the second layer and which has a third acceptor density, on top of the second layer in a third growing environment.

Abstract: One embodiment of the present invention provides a method for fabricating a group III-V nitride structure with an ohmic-contact layer. The method involves fabricating a group III-V nitride structure with a p-type layer. The method further involves depositing an ohmic-contact layer on the p-type layer without first annealing the p-type layer. The method also involves subsequently annealing the p-type layer and the ohmic-contact layer in an annealing chamber at a predetermined temperature for a predetermined period of time, thereby reducing the resistivity of the p-type layer and the ohmic contact in a single annealing process.

Abstract: A method for fabricating quantum wells by using indium gallium nitride (InGaN) semiconductor material includes fabricating a potential well on a layered group III-V nitride structure at a first predetermined temperature in a reactor chamber by injecting into the reactor chamber an In precursor gas and a Ga precursor gas. The method further includes, subsequent to the fabrication of the potential well, terminating the Ga precursor gas, maintaining a flow of the In precursor gas, and increasing the temperature in the reactor chamber to a second predetermined temperature while adjusting the In precursor gas flow rate from a first to a second flow rate. In addition, the method includes annealing and stabilizing the potential well at the second predetermined temperature while maintaining the second flow rate. The method also includes fabricating a potential barrier above the potential well at the second predetermined temperature while resuming the Ga precursor gas.

Abstract: A method for fabricating a group III-V n-type nitride structure comprises fabricating a growth Si substrate and then depositing a group III-V n-type layer above the Si substrate using silane gas (SiH4) as a precursor at a flow rate set to a first predetermined value (210). Subsequently, the SiH4 flow rate is reduced to a second predetermined value during the fabrication of the n-type layer (220). The method also comprises forming a multi-quantum-well active region above the n-type layer. In addition, the flow rate is reduced over a predetermined period of time, and the second predetermined value is reached at a predetermined, sufficiently small distance from the interface between the n-type layer and the active region (230).

Abstract: One embodiment of the present invention provides a gallium nitride (GaN)-based semiconductor light-emitting device (LED) which includes an n-type GaN-based semiconductor layer (n-type layer); an active layer; and a p-type GaN-based semiconductor layer (p-type layer). The n-type layer is epitaxially grown by using ammonia gas (NH3) as the nitrogen source prior to growing the active layer and the p-type layer. The flow rate ratio between group V and group III elements is gradually reduced from an initial value to a final value. The GaN-based LED exhibits a reverse breakdown voltage equal to or greater than 60 volts.

Abstract: A method for fabricating quantum wells by using indium gallium nitride (InGaN) semiconductor material includes fabricating a potential well on a layered group III-V nitride structure at a first predetermined temperature in a reactor chamber by injecting into the reactor chamber an In precursor gas and a Ga precursor gas. The method further includes, subsequent to the fabrication of the potential well, terminating the Ga precursor gas, maintaining a flow of the In precursor gas, and increasing the temperature in the reactor chamber to a second predetermined temperature while adjusting the In precursor gas flow rate from a first to a second flow rate. In addition, the method includes annealing and stabilizing the potential well at the second predetermined temperature while maintaining the second flow rate. The method also includes fabricating a potential barrier above the potential well at the second predetermined temperature while resuming the Ga precursor gas.

Abstract: A semiconductor light-emitting device includes a substrate, a first doped semiconductor layer, a second doped semiconductor layer situated above the first doped semiconductor layer, and a multi-quantum-well (MQW) active layer situated between the first and the second doped layers. The device also includes a first electrode coupled to the first doped semiconductor layer, wherein part of the first doped semiconductor layer is passivated, and wherein the passivated portion of the first doped semiconductor layer substantially insulates the first electrode from the edges of the first doped semiconductor layer, thereby reducing surface recombination. The device further includes a second electrode coupled to the second doped semiconductor layer and a passivation layer which substantially covers the sidewalls of the first and second doped semiconductor layers, the MQW active layer, and part of the horizontal surface of the second doped semiconductor layer which is not covered by the second electrode.

Abstract: There is provided a method of fabricating InGaAlN film on a silicon substrate, which comprises the following steps of forming a pattern structured having grooves and mesas on the silicon substrate, and depositing InGaAlN film on the surface of substrate, wherein the depth of the grooves is more than 6 nm, and the InGaAlN film formed on the mesas of both sides of the grooves are disconnected in the horizontal direction. The method may grow high quality, no crack and large area of InGaAlN film by simply treating the substrate. At the same time, there is also provided a method of fabricating InGaAlN light-emitting device by using the silicon substrate.

Abstract: One embodiment of the present invention provides a gallium nitride (GaN)-based semiconductor light-emitting device (LED) which includes an n-type GaN-based semiconductor layer (n-type layer); an active layer; and a p-type GaN-based semiconductor layer (p-type layer). The n-type layer is epitaxially grown by using ammonia gas (NH3) as the nitrogen source prior to growing the active layer and the p-type layer. The flow rate ratio between group V and group III elements is gradually reduced from an initial value to a final value. The GaN-based LED exhibits a reverse breakdown voltage equal to or greater than 60 volts.

Abstract: One embodiment of the present invention provides a method for fabricating a group III-V nitride structure with an ohmic-contact layer. The method involves fabricating a group III-V nitride structure with a p-type layer. The method further involves depositing an ohmic-contact layer on the p-type layer without first annealing the p-type layer. The method also involves subsequently annealing the p-type layer and the ohmic-contact layer in an annealing chamber at a predetermined temperature for a predetermined period of time, thereby reducing the resistivity of the p-type layer and the ohmic contact in a single annealing process.

Abstract: There is provided a method of fabricating InGaAlN film on a silicon substrate, which comprises the following steps of forming a pattern structured having grooves and mesas on the silicon substrate, and depositing InGaAlN film on the surface of substrate, wherein the depth of the grooves is more than 6 nm, and the InGaAlN film formed on the mesas of both sides of the grooves are disconnected in the horizontal direction. The method may grow high quality, no crack and large area of InGaAlN film by simply treating the substrate. At the same time, there is also provided a method of fabricating InGaAlN light-emitting device by using the silicon substrate.

Abstract: One embodiment of the present invention provides a method for fabricating a group III-V p-type nitride structure. The method comprises growing a first layer of p-type group III-V material with a first acceptor density in a first growing environment. The method further comprises growing a second layer of p-type group III-V material, which is thicker than the first layer and which has a second acceptor density, on top of the first layer in a second growing environment. In addition, the method comprises growing a third layer of p-type group III-V material, which is thinner than the second layer and which has a third acceptor density, on top of the second layer in a third growing environment.