Patents by Inventor Chunrong Lai

Chunrong Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230229196
    Abstract: The display module (100) includes: a supporting member (2) and a display panel (2), supporting member (1) includes an interlayer part (11) and a supporting part (12), the surface of the side of the supporting part (12) that is away from the interlayer part (11) is a supporting curved face (121), the supporting curved face (121) protrudes in the direction away from the interlayer part (11), the display panel (2) includes a non-bending part (21), a bending part (22) and a connecting part (23), the non-bending part (21) and the connecting part (23) are located on the two sides of the interlayer part (11) in the thickness direction of the interlayer part (11), the bending part (22) supports the side of the supporting part (12) that is away from the interlayer part (11), and the inner surface of the bending part (22) adheres to the supporting curved face (121).
    Type: Application
    Filed: May 12, 2021
    Publication date: July 20, 2023
    Applicants: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ming Li, Lin Xiong, Yuliang Wang, Jun Wang, Xu Zhao, Shenghua Bai, Jie Li, Xing Zou, Fanyou Li, Mu Zeng, Chao Liu, Miao Wang, Jie Tu, Zhoujun Chen, Guifang He, Chunrong Lai
  • Publication number: 20190371827
    Abstract: Embodiments of the present application disclose a flexible thin film transistor and a manufacturing method therefor. The flexible thin film transistor includes: a substrate; an active layer formed on the substrate; a gate electrode formed on the active layer; and an organic insulation layer formed on the gate electrode. In the present application, a stress of interlayer dielectric layer(s) is decreased. The overall thickness of the interlayer dielectric layer(s) is reduced, and thereby a bendability of a flexible display screen is improved.
    Type: Application
    Filed: August 14, 2019
    Publication date: December 5, 2019
    Inventors: Chunrong LAI, Jiwen ZONG
  • Patent number: 8126911
    Abstract: Methods and systems are provided for partitioning data of a database or data store into several independent parts as part of a data mining process. The methods and systems use a mining application having content-based partitioning logic to partition the data. Once the data is partitioned, the partitioned data may be grouped and distributed to an associated processor for further processing. The mining application and content-based partitioning logic may be used in a computing system, including shared memory and distributed memory multi-processor computing systems. Other embodiments are described and claimed.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: February 28, 2012
    Assignee: Intel Corporation
    Inventors: Wei Hu, Chunrong Lai
  • Patent number: 8019715
    Abstract: In a parallel system, multiple threads operate in parallel to perform network structure learning. A global score cache is partitioned into multiple split score caches, which may in one embodiment include associating a score cache with a node of the structure to be learned. With a split score cache, the learning may be performed in split neighbor scoring loops, with the first loop operating on separate score cache partitions, and warming the score cache partitions for the second loop.
    Type: Grant
    Filed: December 31, 2004
    Date of Patent: September 13, 2011
    Assignee: Intel Corporation
    Inventors: Chunrong Lai, Wei Hu
  • Patent number: 7627537
    Abstract: Reuse of intermediate statistical score computations. Learning a network structure may involve computationally intensive operations. In one embodiment a partial result may be computed and cached that will be used in computing the score of another network structure. A speculative determination whether to cache the partial result may be made.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: December 1, 2009
    Assignee: Intel Corporation
    Inventor: Chunrong Lai
  • Publication number: 20080281771
    Abstract: In a parallel system, multiple threads operate in parallel to perform network structure learning. A global score cache is partitioned into multiple split score caches, which may in one embodiment include associating a score cache with a node of the structure to be learned. With a split score cache, the learning may be performed in split neighbor scoring loops, with the first loop operating on separate score cache partitions, and warming the score cache partitions for the second loop.
    Type: Application
    Filed: December 31, 2004
    Publication date: November 13, 2008
    Inventors: Chunrong Lai, Wei Hu
  • Patent number: 7418386
    Abstract: According to one aspect of the invention, a method is provided in which a set of probabilistic attributes in an N-gram language model is classified into a plurality of classes. Each resultant class is clustered into a plurality of segments to build a code-book for the respective class using a modified K-means clustering process which dynamically adjusts the size and centroid of each segment during each iteration in the modified K-means clustering process. A probabilistic attribute in each class is then represented by the centroid of the corresponding segment to which the respective probabilistic attribute belongs.
    Type: Grant
    Filed: April 3, 2001
    Date of Patent: August 26, 2008
    Assignee: Intel Corporation
    Inventors: Chunrong Lai, Qingwei Zhao, Jielin Pan
  • Patent number: 7254681
    Abstract: A method of operating a sub-sector cache includes receiving a request for a first sub-sector of a first cache line. The method further includes identifying a first replaced line in a cache data RAM, the first replaced line including a plurality of replaced sub-sectors. The method further includes storing the first sub-sector in the cache data RAM in place of a first replaced sub-sectors and storing an identifier of at least a second replaced sub-sector in a victim sector tag buffer.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: August 7, 2007
    Assignee: Intel Corporation
    Inventor: Chunrong Lai
  • Publication number: 20070094213
    Abstract: In a parallel system, multiple threads operate in parallel to perform network structure learning. A global score cache is partitioned into multiple split score caches, which may in one embodiment include associating a score cache with a node of the structure to be learned. With a split score cache, the learning may be performed in split neighbor scoring loops, with the first loop operating on separate score cache partitions, and warming the score cache partitions for the second loop.
    Type: Application
    Filed: July 14, 2005
    Publication date: April 26, 2007
    Inventors: Chunrong Lai, Wei Hu
  • Publication number: 20060112057
    Abstract: Reuse of intermediate statistical score computations. Learning a network structure may involve computationally intensive operations. In one embodiment a partial result may be computed and cached that will be used in computing the score of another network structure. A speculative determination whether to cache the partial result may be made.
    Type: Application
    Filed: October 28, 2004
    Publication date: May 25, 2006
    Inventor: Chunrong Lai
  • Publication number: 20060069875
    Abstract: A method of operating a sub-sector cache includes receiving a request for a first sub-sector of a first cache line. The method further includes identifying a first replaced line in a cache data RAM, the first replaced line including a plurality of replaced sub-sectors. The method further includes storing the first sub-sector in the cache data RAM in place of a first replaced sub-sectors and storing an identifier of at least a second replaced sub-sector in a victim sector tag buffer.
    Type: Application
    Filed: November 17, 2005
    Publication date: March 30, 2006
    Inventor: Chunrong Lai
  • Publication number: 20060053015
    Abstract: According to one aspect of the invention, a method is provided in which a set of probabilistic attributes in an N-gram language model is classified into a plurality of classes. Each resultant class is clustered into a plurality of segments to build a code-book for the respective class using a modified K-means clustering process which dynamically adjusts the size and centroid of each segment during each iteration in the modified K-means clustering process. A probabilistic attribute in each class is then represented by the centroid of the corresponding segment to which the respective probabilistic attribute belongs.
    Type: Application
    Filed: April 3, 2001
    Publication date: March 9, 2006
    Inventors: Chunrong Lai, Qingwei Zhao, Jielin Pan
  • Patent number: 7000082
    Abstract: A method of operating a sub-sector cache includes receiving a request for a first sub-sector of a first cache line. The method further includes identifying a first replaced line in a cache data RAM, the first replaced line including a plurality of replaced sub-sectors. The method further includes storing the first sub-sector in the cache data RAM in place of a first replaced sub-sectors and storing an identifier of at least a second replaced sub-sector in a victim sector tag buffer.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: February 14, 2006
    Assignee: Intel Corporation
    Inventor: Chunrong Lai
  • Publication number: 20060015706
    Abstract: Embodiments of the present invention relate to an apparatus and method to enable efficient branch prediction in super-scalar and other branching-enabled processors. In accordance with an embodiment of the present invention, a branch predictor may include a branch prediction circuit to predict a branch outcome in an executing instruction in a processor using an input from a translation look-aside buffer.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 19, 2006
    Inventor: Chunrong Lai
  • Publication number: 20040128447
    Abstract: A method of operating a sub-sector cache includes receiving a request for a first sub-sector of a first cache line. The method further includes identifying a first replaced line in a cache data RAM, the first replaced line including a plurality of replaced sub-sectors. The method further includes storing the first sub-sector in the cache data RAM in place of a first replaced sub-sectors and storing an identifier of at least a second replaced sub-sector in a victim sector tag buffer.
    Type: Application
    Filed: February 13, 2003
    Publication date: July 1, 2004
    Inventor: Chunrong Lai
  • Publication number: 20030061046
    Abstract: A system is described for recognizing continuous speech based on M-gram language model. The system includes a lexical tree having a number of nodes, a buffer having a number of entries and a merging task to merge tokens to form a merged token list. The system decodes an input speech by propagating tokens along a number of different paths within the lexical tree. Each token contains information relating to a probability score and a word path history. The merging task is configured (1) to access a token list containing a group of tokens that have propagated to current state from a number of transition states, (2) to place tokens into an appropriate entry in the buffer according to a hash value and (3) to merge tokens with the same sequence of word candidates.
    Type: Application
    Filed: September 27, 2001
    Publication date: March 27, 2003
    Inventors: Qingwei Zhao, Jielin Pan, Yonghong Yan, Chunrong Lai