Patents by Inventor Chunxiang NAN

Chunxiang NAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11462533
    Abstract: An ESD protection circuit, an array substrate and a display device are disclosed. The ESD protection circuit includes a plurality of first ESD units, each of which includes: a first active layer, a first insulating layer, a first metallic layer, a second insulating layer and a second metallic layer which are disposed on a base substrate; the first active layer includes a plurality of first connection terminals; the first metallic layer includes a plurality of first conductive terminals; the second metallic layer includes a plurality of second conductive terminals an orthographic projection of the first metallic layer and an orthographic projection of the second metallic layer the base substrate are at least partly overlapped with an orthographic projection of the first active layer on the base substrate respectively; and the first conductive terminals and the second conductive terminals are electrically connected with different first connection terminals, respectively.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: October 4, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Chen Ting Liu, Zhiming Hu, Chunxiang Nan, Xiaodong Pan, Lili Cao, Ping Wang, Xiaochuan Ma
  • Publication number: 20210366899
    Abstract: An ESD protection circuit, an array substrate and a display device are disclosed. The ESD protection circuit includes a plurality of first ESD units, each of which includes: a first active layer a first insulating layer, a first metallic layer, a second insulating layer and a second metallic layer which are disposed on a base substrate; the first active layer includes a plurality of first connection terminals; the first metallic layer includes a plurality of first conductive terminals; the second metallic layer includes a plurality of second conductive terminals an orthographic projection of the first metallic layer and an orthographic projection of the second metallic layer the base substrate are at least partly overlapped with an orthographic projection of the first active layer on the base substrate respectively; and the first conductive terminals and the second conductive terminals are electrically connected with different first connection terminals, respectively.
    Type: Application
    Filed: February 28, 2019
    Publication date: November 25, 2021
    Inventors: Chen Ting LIU, Zhiming HU, Chunxiang NAN, Xiaodong PAN, Lili CAO, Ping WANG, Xiaochuan MA
  • Patent number: 10756117
    Abstract: An array substrate includes a display region and a peripheral circuit region surrounding the display region. The array substrate further includes: a base substrate; first TFTs arranged on a first surface of the base substrate and at the display region, and each first TFT including a first gate electrode, a first active layer and a first source-drain electrode; and second TFTs arranged on the first surface and at the peripheral circuit region, and each second TFT including a second gate electrode, a second active layer and a second source-drain electrode. The first active layer of each first TFT is made of a material different from, and arranged at a same layer as, the second active layer of each second TFT, and the first source-drain electrode is arranged at a same layer as the second source-drain electrode.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: August 25, 2020
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chao Wang, Shengwei Zhao, Huafeng Liu, Chunxiang Nan
  • Patent number: 10573640
    Abstract: An electro-static discharge assembly, an array substrate and a fabrication method thereof, and a display panel are provided. The electro-static discharge assembly includes: a base substrate; a semiconductor layer, a first insulating layer, a first auxiliary electrode, a first electrode and a second electrode provided on the base substrate, wherein the first electrode and the second electrode are spaced apart from each other and are respectively in contact with the semiconductor layer, the first auxiliary electrode is in contact with one of the first electrode and the second electrode, and the first insulating layer is provided between the first auxiliary electrode and both the first electrode and the second electrode.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: February 25, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Chen Ting Liu, Xiaodong Pan, Zhiming Hu, Chunxiang Nan
  • Publication number: 20200043954
    Abstract: An array substrate includes a display region and a peripheral circuit region surrounding the display region. The array substrate further includes: a base substrate; first TFTs arranged on a first surface of the base substrate and at the display region, and each first TFT including a first gate electrode, a first active layer and a first source-drain electrode; and second TFTs arranged on the first surface and at the peripheral circuit region, and each second TFT including a second gate electrode, a second active layer and a second source-drain electrode. The first active layer of each first TFT is made of a material different from, and arranged at a same layer as, the second active layer of each second TFT, and the first source-drain electrode is arranged at a same layer as the second source-drain electrode.
    Type: Application
    Filed: May 7, 2019
    Publication date: February 6, 2020
    Inventors: Chao Wang, Shengwei Zhao, Huafeng Liu, Chunxiang Nan
  • Publication number: 20180204830
    Abstract: An electro-static discharge assembly, an array substrate and a fabrication method thereof, and a display panel are provided. The electro-static discharge assembly includes: a base substrate; a semiconductor layer, a first insulating layer, a first auxiliary electrode, a first electrode and a second electrode provided on the base substrate, wherein the first electrode and the second electrode are spaced apart from each other and are respectively in contact with the semiconductor layer, the first auxiliary electrode is in contact with one of the first electrode and the second electrode, and the first insulating layer is provided between the first auxiliary electrode and both the first electrode and the second electrode.
    Type: Application
    Filed: May 5, 2017
    Publication date: July 19, 2018
    Inventors: Chen Ting LIU, Xiaodong PAN, Zhiming HU, Chunxiang NAN
  • Publication number: 20180084872
    Abstract: An annular electronic device, including at least two curved sections which are connected into a ring, wherein each curved section includes a processing chip and a display panel, in which the display panel is disposed on an external surface of the curved section, and the processing chip is connected with the display panel. The display area of the annular electronic device is adjustable, and can prolong the service life thereof to a certain degree.
    Type: Application
    Filed: August 25, 2016
    Publication date: March 29, 2018
    Inventors: Jiamian SUN, Chunxiang NAN, Liang YUAN, Yannan CHEN, Lei YUE, Qi WANG, Zhiming HU