Patents by Inventor Chun-Yang WANG

Chun-Yang WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967642
    Abstract: A semiconductor structure includes a buffer layer, a channel layer, a barrier layer, a doped compound semiconductor layer, and a composition gradient layer. The buffer layer is disposed on a substrate, the channel layer is disposed on the buffer layer, the barrier layer is disposed on the channel layer, the doped compound semiconductor layer is disposed on the barrier layer, and the composition gradient layer is disposed between the barrier layer and the doped compound semiconductor layer. The barrier layer and the composition gradient layer include a same group III element and a same group V element, and the atomic percentage of the same group III element in the composition gradient layer is gradually increased in the direction from the barrier layer to the doped compound semiconductor layer. A high electron mobility transistor and a fabrication method thereof are also provided.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: April 23, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chih-Yen Chen, Tuan-Wei Wang, Franky Juanda Lumbantoruan, Chun-Yang Chen
  • Publication number: 20240072115
    Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.
    Type: Application
    Filed: February 13, 2023
    Publication date: February 29, 2024
    Inventors: Wei-Xiang You, Wei-De Ho, Hsin Yang Hung, Meng-Yu Lin, Hsiang-Hung Huang, Chun-Fu Cheng, Kuan-Kan Hu, Szu-Hua Chen, Ting-Yun Wu, Wei-Cheng Tzeng, Wei-Cheng Lin, Cheng-Yin Wang, Jui-Chien Huang, Szuya Liao
  • Publication number: 20170206253
    Abstract: Examples relate to communication of event-based content. The examples disclosed herein enable obtaining, by a first server computing device, a first event that is generated by a second server computing device based on a first request from a first user. The first event may comprise a first set of contextual attributes that describe the first event. The examples disclosed herein further enable identifying, by the first server computing device, a first set of content categories that are related to the first event and obtaining, by the first server computing device, first content for at least one of the first set of content categories. The first content may be determined based on at least one of the first set of contextual attributes. The examples disclosed herein further enable providing, by the first server computing device, the first content to a client computing device of the first user.
    Type: Application
    Filed: September 30, 2014
    Publication date: July 20, 2017
    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT L.P.
    Inventors: Chun-Yang WANG, Qing-Yi WANG, Ye LIU