Patents by Inventor Chun-Yi Huang
Chun-Yi Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240192466Abstract: An optical photographing lens assembly includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The second lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof. The third lens element has two surfaces being both aspheric. The fourth lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof, wherein two surfaces thereof are aspheric. The fifth lens element has an image-side surface being convex in a paraxial region thereof, wherein two surfaces thereof are aspheric.Type: ApplicationFiled: February 19, 2024Publication date: June 13, 2024Inventors: Dung-Yi HSIEH, Chun-Yen CHEN, Chun-Che HSUEH, Hsin-Hsuan HUANG
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Patent number: 12009232Abstract: In an embodiment, an apparatus comprising: a heater configured to heat a wafer located on a wafer staging area of the heater, the heater comprising a heater shaft extending below the wafer staging area; and a heater lift assembly comprising: a lift shaft configured to move the heater shaft in a vertical direction; a clamp that connects the heater shaft to the lift shaft; and a damper disposed on top of the clamp.Type: GrantFiled: June 17, 2022Date of Patent: June 11, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kai-Wen Wu, Chun-Ta Chen, Chin-Shen Hsieh, Cheng-Yi Huang
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Patent number: 12010919Abstract: A heterogeneous integration chip of a micro fluid actuator is disclosed and includes a first substrate, a first insulation layer, a first conductive layer, a piezoelectric layer, a second conductive layer, a second substrate, a control element, a perforated trench and a conductor. The first substrate includes a first chamber. The first insulation layer is disposed on the first substrate. The first conductive layer is disposed on the first insulation layer and includes an electrode pad. The piezoelectric layer and the second conductive layer are stacked on the first conductive layer sequentially. The second substrate is assembled to the first substrate through a bonding layer to define a second chamber and includes an orifice, a fluid flowing channel and a third chamber. The control element is disposed in the second substrate. The perforated trench filled with the conductor is penetrated from the electrode pad to the second substrate.Type: GrantFiled: April 27, 2021Date of Patent: June 11, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Hsien-Chung Tai, Lin-Huei Fang, Yung-Lung Han, Chi-Feng Huang, Chun-Yi Kuo, Tsung-I Lin, Chin-Wen Hsieh
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Patent number: 12002774Abstract: An integrated circuit (IC) comprising an enhanced passivation scheme for pad openings and trenches is provided. In some embodiments, an interlayer dielectric (ILD) layer covers a substrate and at least partially defines a trench. The trench extends through the ILD layer from a top of the ILD layer to the substrate. A conductive pad overlies the ILD layer. A first passivation layer overlies the ILD layer and the conductive pad, and further defines a pad opening overlying the conductive pad. A second passivation layer overlies the ILD layer, the conductive pad, and the first passivation layer, and further lines sidewalls of the first passivation layer in the pad opening and sidewalls of the ILD layer in the trench. Further, the second passivation layer has a low permeability for moisture or vapor relative to the ILD layer.Type: GrantFiled: September 8, 2022Date of Patent: June 4, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Hong Chang, Chun-Yi Yang, Kun-Ming Huang, Po-Tao Chu, Shen-Ping Wang, Chien-Li Kuo
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Publication number: 20240178102Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.Type: ApplicationFiled: April 21, 2023Publication date: May 30, 2024Inventors: Chun-Ti LU, Hao-Yi TSAI, Chiahung LIU, Ken-Yu CHANG, Tzuan-Horng LIU, Chih-Hao CHANG, Bo-Jiun LIN, Shih-Wei CHEN, Pei-Rong NI, Hsin-Wei HUANG, Zheng GangTsai, Tai-You LIU, Steve SHIH, Yu-Ting HUANG, Steven SONG, Yu-Ching WANG, Tsung-Yuan YU, Hung-Yi KUO, CHung-Shi LIU, Tsung-Hsien CHIANG, Ming Hung TSENG, Yen-Liang LIN, Tzu-Sung HUANG, Chun-Chih CHUANG
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Patent number: 11990547Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming recesses adjacent to two sides of the gate structure, forming a buffer layer in the recesses, forming a first linear bulk layer on the buffer layer, forming a second linear bulk layer on the first linear bulk layer, forming a bulk layer on the second linear bulk layer, and forming a cap layer on the bulk layer.Type: GrantFiled: September 27, 2020Date of Patent: May 21, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Yu Chen, Bo-Lin Huang, Jhong-Yi Huang, Keng-Jen Lin, Yu-Shu Lin
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Patent number: 11986763Abstract: A remote control system for gas detection and purification is disclosed and includes a remote control device, a gas detection module and a gas purification device. The remote control device includes a gas inlet and a gas outlet. The gas detection module is disposed in the remote control device and in communication with the gas outlet to detect the gas located in an indoor space. The gas detection module provides and outputs a gas detection datum, and the remote control device transmits an operation command via wireless transmission. The gas purification device is disposed in the indoor space and receives the operating instruction transmitted from the remote control device to be operated. When the gas purification device is under the activated state, the gas in the indoor space is purified, and the purification operation mode of the gas purification device is adjusted according to the first gas detection datum.Type: GrantFiled: November 30, 2020Date of Patent: May 21, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chun-Yi Kuo, Yang Ku, Chang-Yen Tsai, Wei-Ming Lee
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Publication number: 20240153068Abstract: A non-contact detection method for a nut is provided. The method includes the following steps. The nut is photographed to obtain a threaded hole image of the nut. A thread area comparison between the threaded hole image and a standard threaded hole image is performed. An area difference is obtained according to the result of the thread area comparison. Whether the nut is a good nut is determined according to the area difference.Type: ApplicationFiled: January 6, 2023Publication date: May 9, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Wei-Shiang HUANG, Tsai-Ling KAO, Chun-Yi LEE, Jhe-Ruei LI
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Publication number: 20240144868Abstract: The present disclosure provides a pixel circuit with pulse width compensation, and the pixel circuit includes a pulse width modulation circuit and a pulse amplitude modulation circuit, and the pulse amplitude modulation circuit is electrically connected to the pulse width modulation circuit. The pulse width modulation circuit includes a P-type pulse width compensation transistor and a first P-type control transistor, and the first P-type control transistor is electrically connected to the P-type pulse width compensation transistor. The pulse amplitude modulation circuit includes a second P-type control transistor, a first capacitor, a P-type driving transistor and a light-emitting element. The second P-type control transistor is electrically connected to the first P-type control transistor. The first capacitor is electrically connected to the second P-type control transistor.Type: ApplicationFiled: December 8, 2022Publication date: May 2, 2024Inventors: De-Fu CHEN, Po Lun CHEN, Chun-Ta CHEN, Ta-Jen HUANG, Po-Tsun LIU, Guang-Ting ZHENG, Ting-Yi YI
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Publication number: 20240139199Abstract: The present disclosure provides a use of a pharmaceutical composition including adenine and/or a pharmaceutically acceptable salt thereof in a manufacture of a medicament for treating diabetic ulcers, and the medicament can effectively accelerate and enhance wound healing of diabetic ulcers and prevent scar formation.Type: ApplicationFiled: March 25, 2022Publication date: May 2, 2024Inventors: Jen-Yi Chio, Han-Min Chen, Jiun-Tsai Lin, Yi-Fang Cheng, Guang-Huar Young, Chun-Fang Huang
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Publication number: 20240135897Abstract: The present disclosure provides a scan driving circuit, which includes a pull-up output charging circuit, a pull-down discharge circuit, a pre-charge circuit, an anti-noise start-up circuit and an anti-noise pull-down discharge circuit. The pull-up output charging circuit is electrically connected to an output terminal, and the pull-down discharge circuit is electrically connected to the output terminal. The pre-charge circuit is electrically connected to the pull-up output charging circuit and the pull-down discharge circuit through a driving node. The anti-noise start-up circuit is electrically connected to the pre-charge circuit. The anti-noise pull-down discharge circuit is electrically connected to the anti-noise start-up circuit, and the anti-noise pull-down discharge circuit is electrically connected to the driving node.Type: ApplicationFiled: December 11, 2022Publication date: April 25, 2024Inventors: De-Fu CHEN, Po Lun CHEN, Chun-Ta CHEN, Ta-Jen HUANG, Po-Tsun LIU, Guang-Ting ZHENG, Ting-Yi YI
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Patent number: 11961489Abstract: The present disclosure provides a scan driving circuit, which includes a pull-up output charging circuit, a pull-down discharge circuit, a pre-charge circuit, an anti-noise start-up circuit and an anti-noise pull-down discharge circuit. The pull-up output charging circuit is electrically connected to an output terminal, and the pull-down discharge circuit is electrically connected to the output terminal. The pre-charge circuit is electrically connected to the pull-up output charging circuit and the pull-down discharge circuit through a driving node. The anti-noise start-up circuit is electrically connected to the pre-charge circuit. The anti-noise pull-down discharge circuit is electrically connected to the anti-noise start-up circuit, and the anti-noise pull-down discharge circuit is electrically connected to the driving node.Type: GrantFiled: December 11, 2022Date of Patent: April 16, 2024Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution LimitedInventors: De-Fu Chen, Po Lun Chen, Chun-Ta Chen, Ta-Jen Huang, Po-Tsun Liu, Guang-Ting Zheng, Ting-Yi Yi
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Publication number: 20240115151Abstract: A physiological signal measurement system, a physiological signal measurement method, and a mobile device protective case are provided. The physiological signal measurement system includes a first electrode, a second electrode, a reference electrode, an impedance front-end circuit module and a dynamic signal matching module. The first electrode, the second electrode and the reference electrode are used to obtain a first sensing signal and a second sensing signal. The impedance front-end circuit module is used to detect a first impedance of the first electrode and a second impedance of the second electrode, and obtain an original differential signal according to the first sensing signal and the second sensing signal. The dynamic signal matching module is used to obtain a calibration sequence according to the first impedance, the second impedance and the original differential signal, and obtain a compensated calibration sequence according to the calibration sequence and the original differential signal.Type: ApplicationFiled: October 5, 2023Publication date: April 11, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yun-Yi HUANG, Yu-Chiao TSAI, Chun LIU, Heng-Yin CHEN
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Patent number: 11944412Abstract: A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas.Type: GrantFiled: June 2, 2021Date of Patent: April 2, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Ying-Lun Chang, Ching-Sung Lin, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Tsung-I Lin
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Patent number: 11948722Abstract: A planar winding transformer includes a magnetic core set and a multilayer circuit board. The magnetic core set includes two magnetic cores and two magnetic columns. The two magnetic cores are parallel to each other. The multilayer circuit board is disposed between two magnetic cores, and two magnetic columns penetrate through the multilayer circuit board. The multilayer circuit board includes two low voltage winding layers and one high voltage winding layer. Two low voltage winding layers are connected to each other in parallel, and the high voltage winding layer is disposed between two low voltage winding layers. When the high voltage winding layer receives a polarity current, at least one of the low voltage winding layers generates a corresponding induced current. Two magnetic cores and two magnetic columns form a closed path for magnetic flux.Type: GrantFiled: January 8, 2021Date of Patent: April 2, 2024Assignees: CHICONY POWER TECHNOLOGY CO., LTD., NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGYInventors: Yen-Shin Lai, Yong-Yi Huang, Chun-Hung Lee, Hao-Chieh Chang
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Patent number: 11937903Abstract: A blood pressure device includes a first blood pressure measuring device, a second blood pressure measuring device, and a controller. The first blood pressure measuring device is to be worn on a first position of a wrist so as to obtain a first blood pressure information of the first position. The second blood pressure measuring device is to be worn on a second position of the wrist so as to obtain a second blood pressure information of the second position. The controller is electrically coupled to the first blood pressure measuring device and the second blood pressure measuring device so as to adjust tightness between the expanders and the user's skin, respectively. The controller receives, processes, and calculates a pulse transit time between the first blood pressure information and the second blood pressure information, and the controller obtains at least one blood pressure value based on the pulse transit time.Type: GrantFiled: December 29, 2020Date of Patent: March 26, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Chin-Wen Hsieh
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Patent number: 11940667Abstract: An optical photographing lens assembly includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The second lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof. The third lens element has two surfaces being both aspheric. The fourth lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof, wherein two surfaces thereof are aspheric. The fifth lens element has an image-side surface being convex in a paraxial region thereof, wherein two surfaces thereof are aspheric.Type: GrantFiled: October 20, 2022Date of Patent: March 26, 2024Assignee: LARGAN PRECISION CO., LTD.Inventors: Dung-Yi Hsieh, Chun-Yen Chen, Chun-Che Hsueh, Hsin-Hsuan Huang
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Publication number: 20240094638Abstract: An optimization method for a mask pattern optical transfer includes steps as follows: First, a projection optical simulation is performed to obtain an optimal pupil configuration scheme corresponding to a virtual mask pattern. Next, a position scanning is performed to change the optimal pupil configuration scheme, so as to generate a plurality of adjusted pupil configuration schemes. A mask pattern transfer simulation is performed to obtain a plurality of pupil configuration schemes-critical dimension relationship data corresponding to the virtual mask pattern. Subsequently, an actual pupil configuration scheme suitable for an actual mask pattern is selected according to the plurality of pupil configuration schemes-critical dimension relationship data, and upon which an actual mask pattern transfer is performed.Type: ApplicationFiled: November 9, 2022Publication date: March 21, 2024Inventors: Chun-Yi CHANG, Wen-Liang HUANG
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Publication number: 20240096781Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.Type: ApplicationFiled: March 20, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
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Patent number: D1021220Type: GrantFiled: July 15, 2021Date of Patent: April 2, 2024Assignee: Radiant Opto-Electronics CorporationInventors: Cheng-Ang Chang, Guo-Hao Huang, Chun-Yi Sun, Chih-Hung Ju, Pin-Tsung Wang