Patents by Inventor Chunyu Zhang

Chunyu Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10585812
    Abstract: An apparatus is described having an electrical interface that supports a first specification and a second specification. The first specification specifies differentially transmitted data. The second specification specifies at least three transmitted data signals. The electrical interface includes a plurality of modular transmitter circuits where each transmitter circuit includes a single ended driver and a select circuit. The select circuit is to select either one end of a differential signal associated with the first specification or one of the at least three transmitted data signals associated with the second specification.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: March 10, 2020
    Assignee: Intel Corporation
    Inventors: Chunyu Zhang, Kevin E. Arendt, Hongjiang Song
  • Patent number: 10176132
    Abstract: In a system where multiple controllers share a link interface but are not all (1) compatible with the same configuration of the physical layer or (2) using the same clocking, a configuration arbitration subsystem intercepts, organizes, and re-clocks configuration-access requests from the various controller agents. Priorities are assigned according to stored policies. The configuration arbiter grants configuration access to the top-priority agent, synchronizing the agent's message with the arbiter's clock. Lower-priority agents' messages are stored in command queues until they ascend to top priority. Besides preventing timing conflicts and streamlining the coordination of clocks, the configuration arbiter may provide access to physical-layer registers beyond the controllers' built-in capabilities to further optimize configuration.
    Type: Grant
    Filed: December 26, 2015
    Date of Patent: January 8, 2019
    Assignee: Intel Corporation
    Inventors: Satheesh Chellappan, Chunyu Zhang
  • Publication number: 20170320980
    Abstract: The present invention relates to the field of polymer materials. Disclosed are a random-syndiotactic block polybutadiene and preparation method thereof, the provided random-syndiotactic block polybutadiene having a structure of formula (I), and comprising a random polybutadiene structure and a syndiotactic 1, 2-polybutadiene structure, being useful as a compatibilizing agent to improve the compatibility of the syndiotactic 1, 2-polybutadiene/polybutadiene rubber blend.
    Type: Application
    Filed: November 19, 2014
    Publication date: November 9, 2017
    Applicant: CHANGGHUN INSTITUTE OF APPLIED CHEMISTRY, CHINESE ACADEMY OF SCIENCES
    Inventors: Xuequan ZHANG, Wenjie ZHENG, Yanming HU, Chunyu ZHANG, Jifu BI
  • Publication number: 20170286327
    Abstract: An apparatus is described having an electrical interface that supports a first specification and a second specification. The first specification specifies differentially transmitted data. The second specification specifies at least three transmitted data signals. The electrical interface includes a plurality of modular transmitter circuits where each transmitter circuit includes a single ended driver and a select circuit. The select circuit is to select either one end of a differential signal associated with the first specification or one of the at least three transmitted data signals associated with the second specification.
    Type: Application
    Filed: March 30, 2016
    Publication date: October 5, 2017
    Inventors: Chunyu ZHANG, Kevin E. ARENDT, HONGJIANG SONG
  • Publication number: 20170185550
    Abstract: In a system where multiple controllers share a link interface but are not all (1) compatible with the same configuration of the physical layer or (2) using the same clocking, a configuration arbitration subsystem intercepts, organizes, and re-clocks configuration-access requests from the various controller agents. Priorities are assigned according to stored policies. The configuration arbiter grants configuration access to the top-priority agent, synchronizing the agent's message with the arbiter's clock. Lower-priority agents' messages are stored in command queues until they ascend to top priority. Besides preventing timing conflicts and streamlining the coordination of clocks, the configuration arbiter may provide access to physical-layer registers beyond the controllers' built-in capabilities to further optimize configuration.
    Type: Application
    Filed: December 26, 2015
    Publication date: June 29, 2017
    Inventors: Satheesh Chellappan, Chunyu Zhang
  • Patent number: 9191192
    Abstract: Systems and methods of operating a serial interconnect interface provide for generating a pulse in response to a state change in a data signal of the serial interface interconnect, and transmitting the pulse from a physical layer of the serial interconnect interface to a link layer of the serial interconnect interface. The duration of the pulse can be selected based on whether the state change corresponds to an end of packet (EOP) condition. In addition, the data signal may include a non return to zero invert (NRZI) encoded signal, wherein the pulse is part of a digital NRZI signal.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: November 17, 2015
    Assignee: Intel Corporation
    Inventors: Huimin Chen, Chunyu Zhang, Paul S. Durley
  • Publication number: 20150233848
    Abstract: An electronic indictor device (100) for cleaning monitoring can be disposed in a wash chamber of a washer-disinfector to monitor the efficacy of a cleaning cycle. The electronic indicator device (100) includes an environmental sensor (110) configured to generate signals indicative of environmental conditions and a processor (120) configured to determine the efficacy of the figured cleaning cycle based on the signals generated by the environmental sensor (110).
    Type: Application
    Filed: May 31, 2012
    Publication date: August 20, 2015
    Applicant: 3M INNNOVATIVE PROPERTIES COMPANY
    Inventors: Pingle Zhou, Yinghua Yang, Chunyu Zhang, Zhiguo Wen, Dong Liu
  • Patent number: 8982999
    Abstract: An embodiment of the invention includes a receiver with reduced error terms and incoming jitter tracking that improves jitter tolerance. An embodiment provides these benefits based on a voltage integrator that recovers data and clock information from incoming signals without use of a PLL, PI, CDR, and the like. An embodiment provides these benefits based on a time integrator that recovers, using digital logic, data and clock information from incoming signals without use of a PLL, PI, CDR, and the like. Other embodiments are described herein.
    Type: Grant
    Filed: September 30, 2012
    Date of Patent: March 17, 2015
    Assignee: Intel Corporation
    Inventors: Kiriti Bhagavathula, Chunyu Zhang, Steven A. Peterson
  • Publication number: 20140206820
    Abstract: The present invention relates to a styrene resin blend having three-layer-structured particles, a method for preparing same, and an application thereof. In parts by weight, 100 parts of a vinyl aromatic compound, 0.1 to 10 parts of an initiator, 2 to 10 parts of an emulsifier, 100 to 300 parts of deionized water, and 0.1 to 10 parts of a cross-linking agent are polymerized at a temperature between 50° C. to 85° C. to acquire a core seeded emulsion; 15 to 70 parts of the core seeded emulsion, 0.
    Type: Application
    Filed: April 13, 2012
    Publication date: July 24, 2014
    Applicant: PETROCHINA COMPANY LIMITED
    Inventors: Ming Chen, Shuo Wang, Huixuan Zhang, Shulai Lu, Chunyu Zhang, Zhichen Cao, Jianxun Pang
  • Publication number: 20140092951
    Abstract: An embodiment of the invention includes a receiver with reduced error terms and incoming jitter tracking that improves jitter tolerance. An embodiment provides these benefits based on a voltage integrator that recovers data and clock information from incoming signals without use of a PLL, PI, CDR, and the like. An embodiment provides these benefits based on a time integrator that recovers, using digital logic, data and clock information from incoming signals without use of a PLL, PI, CDR, and the like. Other embodiments are described herein.
    Type: Application
    Filed: September 30, 2012
    Publication date: April 3, 2014
    Inventors: Kiriti Bhagavathula, Chunyu Zhang, Steven A. Peterson
  • Publication number: 20130235913
    Abstract: Systems and methods of operating a serial interconnect interface provide for generating a pulse in response to a state change in a data signal of the serial interface interconnect, and transmitting the pulse from a physical layer of the serial interconnect interface to a link layer of the serial interconnect interface. The duration of the pulse can be selected based on whether the state change corresponds to an end of packet (EOP) condition. In addition, the data signal may include a non return to zero invert (NRZI) encoded signal, wherein the pulse is part of a digital NRZI signal.
    Type: Application
    Filed: April 4, 2013
    Publication date: September 12, 2013
    Inventors: Huimin Chen, Chunyu Zhang, Paul S. Durley
  • Patent number: 8416905
    Abstract: Systems and methods of operating a serial interconnect interface provide for generating a pulse in response to a state change in a data signal of the serial interface interconnect, and transmitting the pulse from a physical layer of the serial interconnect interface to a link layer of the serial interconnect interface. The duration of the pulse can be selected based on whether the state change corresponds to an end of packet (EOP) condition. In addition, the data signal may include a non return to zero invert (NRZI) encoded signal, wherein the pulse is part of a digital NRZI signal.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: April 9, 2013
    Assignee: Intel Corporation
    Inventors: Huimin Chen, Chunyu Zhang, Paul S. Durley
  • Patent number: 8350072
    Abstract: The invention provides a method for producing soluble neodymium chloride complex using neodymium chloride aqueous solution as raw material, thereby avoiding the use of anhydrous neodymium chloride, simplifying the synthesis process and reducing the cost for synthesizing neodymium chloride complex. The neodymium chloride complex produced by this method is soluble not only in polar solvent, but also in nonpolar solvent. Such neodymium chloride complex also has good dissolvability in aliphatic hydrocarbon solvent which has relatively weaker solution power, and even in aliphatic hydrocarbon solvent with 6 or less carbon atoms which has even lower solution power. Since neodymium chloride complex is soluble in aliphatic hydrocarbon solvent, its transportation may be conducted, which is convenient for industrial application and contributes to improve the utilization efficiency of rare earth.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: January 8, 2013
    Assignee: CHangchun Institute of Applied Chemistry Chinese Academy of Sciences
    Inventors: Jifu Bi, Xuequan Zhang, Liansheng Jiang, Hongguang Cai, Bei Wang, Chunyu Zhang, Lihua Na, Quanquan Dai, Changliang Fan
  • Publication number: 20120076251
    Abstract: Systems and methods of operating a serial interconnect interface provide for generating a pulse in response to a state change in a data signal of the serial interface interconnect, and transmitting the pulse from a physical layer of the serial interconnect interface to a link layer of the serial interconnect interface. The duration of the pulse can be selected based on whether the state change corresponds to an end of packet (EOP) condition. In addition, the data signal may include a non return to zero invert (NRZI) encoded signal, wherein the pulse is part of a digital NRZI signal.
    Type: Application
    Filed: September 24, 2010
    Publication date: March 29, 2012
    Inventors: Huimin Chen, Chunyu Zhang, Paul S. Durley
  • Publication number: 20110160473
    Abstract: The invention provides a method for producing soluble neodymium chloride complex using neodymium chloride aqueous solution as raw material, thereby avoiding the use of anhydrous neodymium chloride, simplifying the synthesis process and reducing the cost for synthesizing neodymium chloride complex. The neodymium chloride complex produced by this method is soluble not only in polar solvent, but also in nonpolar solvent. Such neodymium chloride complex also has good dissolvability in aliphatic hydrocarbon solvent which has relatively weaker solution power, and even in aliphatic hydrocarbon solvent with 6 or less carbon atoms which has even lower solution power. Since neodymium chloride complex is soluble in aliphatic hydrocarbon solvent, its transportation may be conducted, which is convenient for industrial application and contributes to improve the utilization efficiency of rare earth.
    Type: Application
    Filed: November 2, 2010
    Publication date: June 30, 2011
    Applicant: Changchun Institute of Applied Chemistry Chinese Academy of Sciences
    Inventors: Jifu Bi, Xuequan Zhang, Liansheng Jiang, Hongguang Cai, Bei Wang, Chunyu Zhang, Lihua Na, Quanquan Dai, Changliang Fan
  • Patent number: 7723449
    Abstract: The present invention relates to a catalyst for synthesizing a polypropylene with a wide molecular weight distribution and use of the same. The catalyst comprises magnesium halide, titanium-containing compound, and an organic phosphate type electron donor compound. By the catalyst according to the present invention, a propylene polymer with a wide molecular weight distribution, easily controllable isotacticity and good processing properties can be synthesized.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: May 25, 2010
    Assignee: Changchun Institute of Applied Chemistry Chinese Academy of Sciences
    Inventors: Chunyu Zhang, Hongguang Cai, Bin Chen, Yuping Yuan, Qiaofeng Zhang, Weimin Dong, Xuequan Zhang
  • Patent number: 7623396
    Abstract: Power consumption of an address bus interface is reduced by reducing drive duration of address signals on the address bus. The address bus interface may operate in normal or power saving mode. In power saving mode, address signals are driven for a quarter of a clock period instead of half a clock period and address strobe edges are moved so that they are aligned with valid address signals.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: November 24, 2009
    Assignee: Intel Corporation
    Inventors: Chunyu Zhang, Chris D. Matthews
  • Publication number: 20090023881
    Abstract: The present invention relates to a catalyst for synthesizing a polypropylene with a wide molecular weight distribution and use of the same. The catalyst comprises magnesium halide, titanium-containing compound, and an organic phosphate type electron donor compound. By the catalyst according to the present invention, a propylene polymer with a wide molecular weight distribution, easily controllable isotacticity and good processing properties can be synthesized.
    Type: Application
    Filed: July 3, 2008
    Publication date: January 22, 2009
    Inventors: Chunyu Zhang, Hongguang Cai, Bin Chen, Yuping Yuan, Qiaofeng Zhang, Weimin Dong, Xuequan Zhang
  • Publication number: 20080288797
    Abstract: Power consumption of an address bus interface is reduced by reducing drive duration of address signals on the address bus. The address bus interface may operate in normal or power saving mode. In power saving mode, address signals are driven for a quarter of a clock period instead of half a clock period and address strobe edges are moved so that they are aligned with valid address signals.
    Type: Application
    Filed: March 22, 2007
    Publication date: November 20, 2008
    Inventors: Chunyu Zhang, Chris D. Matthews
  • Patent number: D705509
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: May 20, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: Dong Liu, Zhiguo Wen, Yinghua Yang, Chunyu Zhang, Pingle Zhou