Abstract: A forming method for a semiconductor structure and the semiconductor structure are provided. The forming method of the semiconductor structure includes: providing a substrate, wherein separate bit line structures are formed on the substrate; forming a first sacrificial layer on a sidewall of a bit line structure; forming first dielectric layer filling gaps between adjacent bit line structures; patterning a first dielectric layer to form vias, wherein the vias expose active regions of the substrate, and the vias and remaining parts of the first dielectric layers are alternately arranged in an extension direction of the bit line structures; forming a second sacrificial layer on sidewalls of a via, and filling the via to form a contact plugs; forming a contact structure on the contact plug; and removing the first sacrificial layer to form first air gap, and removing the second sacrificial layer to form a second air gap.

Abstract: A semiconductor structure and a semiconductor structure manufacturing method is provided. The semiconductor structure includes: a wordline; and a first bitline and a second bitline located on two sides of the wordline and a first storage structure and a second storage structure located on the two sides of the wordline, the first bitline and the second bitline being connected to the first storage structure and the second storage structure respectively through a transistor. An extension direction of the first bitline and an extension direction of the wordline are at an acute or obtuse angle. In this way, the first storage structure and the second storage structure are provided on both sides of the wordline, which can increase storage capacity.

Abstract: A method for forming a semiconductor structure and the semiconductor structure are provided. The method for forming the semiconductor structure includes: providing a substrate, wherein a separate bit line structure is formed on the substrate; forming a first sacrificial layer on the side wall of the bit line structure; forming a first dielectric layer filling gap between the bit line structures; patterning the first dielectric layer and the first sacrificial layer to form a through hole, wherein the through hole and the remaining first dielectric layer and first sacrificial layer are alternately arranged; forming a second sacrificial layer on the side wall of the through hole, and filling the through hole to form a contact plug; forming a contact structure on the contact plug; and removing the first sacrificial layer to form a first air gap, and removing the second sacrificial layer to form a second air gap.

Abstract: Embodiments of the present disclosure propose a semiconductor packaging method and a semiconductor structure. The semiconductor packaging method includes: providing a substrate; forming a metal pad on the substrate, where there is a gap between a sidewall of the metal pad and the substrate; and connecting multiple metal pads on substrates to each other.

Abstract: Embodiments of the present application provide a semiconductor structure and a semiconductor structure manufacturing method. The semiconductor structure includes: a wordline; and a first bitline and a second bitline located on two sides of the wordline and a first memory structure and a second memory structure located on the two sides of the wordline. The first bitline and the second bitline are connected to the first memory structure and the second memory structure respectively through a transistor. An extension direction of the first bitline is perpendicular to an extension direction of the wordline.

Abstract: Embodiments of the present application provide a semiconductor structure and a semiconductor structure manufacturing method. The semiconductor structure includes: a wordline; and a first bitline and a second bitline located on two sides of the wordline and a first memory structure and a second memory structure located on the two sides of the wordline. The first bitline and the second bitline are connected to the first memory structure and the second memory structure respectively through a transistor. An extension direction of the first bitline is perpendicular to an extension direction of the wordline.

Abstract: A forming method for a semiconductor structure and the semiconductor structure are provided. The forming method of the semiconductor structure includes: providing a substrate, wherein separate bit line structures are formed on the substrate; forming a first sacrificial layer on a sidewall of a bit line structure; forming first dielectric layer filling gaps between adjacent bit line structures; patterning a first dielectric layer to form vias, wherein the vias expose active regions of the substrate, and the vias and remaining parts of the first dielectric layers are alternately arranged in an extension direction of the bit line structures; forming a second sacrificial layer on sidewalls of a via, and filling the via to form a contact plugs; forming a contact structure on the contact plug; and removing the first sacrificial layer to form first air gap, and removing the second sacrificial layer to form a second air gap.

Abstract: A method for forming a semiconductor structure and the semiconductor structure are provided. The method for forming the semiconductor structure includes: providing a substrate, wherein a separate bit line structure is formed on the substrate; forming a first sacrificial layer on the side wall of the bit line structure; forming a first dielectric layer filling gap between the bit line structures; patterning the first dielectric layer and the first sacrificial layer to form a through hole, wherein the through hole and the remaining first dielectric layer and first sacrificial layer are alternately arranged; forming a second sacrificial layer on the side wall of the through hole, and filling the through hole to form a contact plug; forming a contact structure on the contact plug; and removing the first sacrificial layer to form a first air gap, and removing the second sacrificial layer to form a second air gap.

Abstract: Embodiments of the present disclosure propose a semiconductor packaging method and a semiconductor structure. The semiconductor packaging method includes: providing a substrate; forming a metal pad on the substrate, where there is a gap between a sidewall of the metal pad and the substrate; and connecting multiple metal pads on substrates to each other.

Abstract: A semiconductor structure and a semiconductor structure manufacturing method is provided. The semiconductor structure includes: a wordline; and a first bitline and a second bitline located on two sides of the wordline and a first storage structure and a second storage structure located on the two sides of the wordline, the first bitline and the second bitline being connected to the first storage structure and the second storage structure respectively through a transistor. An extension direction of the first bitline and an extension direction of the wordline are at an acute or obtuse angle. In this way, the first storage structure and the second storage structure are provided on both sides of the wordline, which can increase storage capacity.