Patents by Inventor Chyi Keh Chern

Chyi Keh Chern has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SIX-SIDED PROTECTION OF A WAFER-LEVEL CHIP SCALE PACKAGE (WLCSP)
    Publication number: 20160322273
    Abstract: Consistent with an example embodiment, a WLCSP (wafer-level chip-scale package) device may be encapsulating in a six-sided protection envelope. The envelope is a molding compound or other resilient material. The encapsulated WLCSP device is protected from handling damage during assembly into the end user's system.
    Type: Application
    Filed: April 28, 2015
    Publication date: November 3, 2016
    Inventors: Chi-Feng Wu, Ting-Fong Bastiaan Simon Dai, Chyi Keh Chern
  • Leadframe for integrated circuit die packaging in a molded package and a method for preparing such a leadframe
    Patent number: 8956920
    Abstract: Embodiments of a method for preparing a leadframe for integrated circuit (IC) die packaging in a molded package with an exposed die pad are disclosed. In one embodiment, a method involves producing a leadframe with a die pad, wherein the die pad has a top surface, a bottom surface, and a perimeter edge. The die pad is then planarized to flatten burrs that may exist at the perimeter edge of the die pad, wherein planarizing the die pad comprises embedding tool markings in the die pad at the perimeter edge of the die pad, the tool markings including a series of peaks and valleys that run parallel to the perimeter edge at all locations around the perimeter edge. Embodiments of a leadframe for IC die packaging in a molded package are also disclosed.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: February 17, 2015
    Assignee: NXP B.V.
    Inventors: Tsung Yi Wu, Chyi Keh Chern, Tsung Wen Chang
  • LEADFRAME FOR INTEGRATED CIRCUIT DIE PACKAGING IN A MOLDED PACKAGE AND A METHOD FOR PREPARING SUCH A LEADFRAME
    Publication number: 20130319744
    Abstract: Embodiments of a method for preparing a leadframe for integrated circuit (IC) die packaging in a molded package with an exposed die pad are disclosed. In one embodiment, a method involves producing a leadframe with a die pad, wherein the die pad has a top surface, a bottom surface, and a perimeter edge. The die pad is then planarized to flatten burrs that may exist at the perimeter edge of the die pad, wherein planarizing the die pad comprises embedding tool markings in the die pad at the perimeter edge of the die pad, the tool markings including a series of peaks and valleys that run parallel to the perimeter edge at all locations around the perimeter edge. Embodiments of a leadframe for IC die packaging in a molded package are also disclosed.
    Type: Application
    Filed: June 1, 2012
    Publication date: December 5, 2013
    Applicant: NXP B.V.
    Inventors: Tsung Yi Wu, Chyi Keh Chern, Tsung Wen Chang