Abstract: An optical receiver (1) comprises a differential TIA (4) linked with a photodiode (2, 3) providing a current sense signal (Isig_tia). The receiver is configured to provide to the TIA a sense signal as a sense TIA input (Isig_tia) and a second input (Idark_tia) which is a proportion of the maximum sense signal. The proportion input is half of said maximum sense signal. The inputs to the TIA are via cascode circuits (5, 6), thereby providing the advantages of a low input impedance for large area photodiodes at the TIA input, while creating a fully differential signal at the output, and the reduction of TIA bandwidth in burst mode applications, which filters out high frequency noise.

Abstract: A supply circuit for providing pulses of current has a current source, a reference voltage source for controlling magnitude of the current, and a current switch for controlling whether or not the current passes through a load. Also, there is a switch control signal terminal for controlling the current switch, and glitch compensation elements including at least one capacitance circuit and associated capacitor drive circuit for feeding a variable correcting voltage back to the reference voltage, and a controller to control said variable voltage.

Abstract: A voltage comparator (1) has a high switching speed and simplicity of design. It minimizes pulse-width distortion of input digital signals when functioning as a digital input buffer in high speed communications applications. In addition it provides a simple hysteresis circuit (31) that is easily tuneable with a reference current. The hysteresis circuit (31) is dependent on a reference current. This current may be chosen to have a proportionality to temperature, supply, or another selectable parameter, and may be programmable, in order to create the desired hysteresis performance.

Abstract: A receiver has a differential transimpedance amplifier (4) with two inputs and two outputs. The differential transimpedance amplifier (4) provides a differential output and this is peak-detected (15, 16) to provide amplitude reference signals. The differential transimpedance amplifier output and the amplitude reference signals are fed to a differential summing amplifier (10), which provides a fully differential signal to a comparator, or to an automatic gain control circuit (5) to regulate the differential transimpedance amplifier gain. The differential summing amplifier (10) output is a fully differential signal, thereby having lower distortion for DC and burst mode receiver applications.

Abstract: A transconductance circuit has an input terminal (VIN) and an output terminal (Out), a first current source (4) having a gate connected to said input terminal (VIN); and a second current source (5), in parallel with said first current source, and having a higher transconductance and a wider dynamic range than the first current source. The current sources are configured so that at a low input voltage only the first current source (4) is on. A voltage drop circuit provides a lower bias voltage for the second current source than for the first current source.

Abstract: A supply circuit for providing pulses of current has a current source, a reference voltage source for controlling magnitude of the current, and a current switch for controlling whether or not the current passes through a load. Also, there is a switch control signal terminal for controlling the current switch, and glitch compensation elements including at least one capacitance circuit and associated capacitor drive circuit for feeding a variable correcting voltage back to the reference voltage, and a controller to control said variable voltage.

Abstract: A receiver has a differential transimpedance amplifier (4) with two inputs and two outputs. The differential transimpedance amplifier (4) provides a differential output and this is peak-detected (15, 16) to provide amplitude reference signals. The differential transimpedance amplifier output and the amplitude reference signals are fed to a differential summing amplifier (10), which provides a fully differential signal to a comparator, or to an automatic gain control circuit (5) to regulate the differential transimpedance amplifier gain. The differential summing amplifier (10) output is a fully differential signal, thereby having lower distortion for DC and burst mode receiver applications.

Abstract: A voltage comparator (1) has a high switching speed and simplicity of design. It minimizes pulse-width distortion of input digital signals when functioning as a digital input buffer in high speed communications applications. In addition it provides a simple hysteresis circuit (31) that is easily tuneable with a reference current. The hysteresis circuit (31) is dependent on a reference current. This current may be chosen to have a proportionality to temperature, supply, or another selectable parameter, and may be programmable, in order to create the desired hysteresis performance.

Abstract: A transconductance circuit has an input terminal (VIN) and an output terminal (Out), a first current source (4) having a gate connected to said input terminal (VIN); and a second current source (5), in parallel with said first current source, and having a higher transconductance and a wider dynamic range than the first current source. The current sources are configured so that at a low input voltage only the first current source (4) is on. A voltage drop circuit provides a lower bias voltage for the second current source than for the first current source.

Abstract: A method that automatically generates a design for an analog phase lock loop (PLL) core in response to a desired clock frequency.

Abstract: A method that automatically generates a design for an analog phase lock loop (PLL) core in response to a desired clock frequency.