Abstract: The present invention relates to a switching arrangement and method of manufacturing such an arrangement, wherein first and second series-shunt diode structures (D1/D2, D3/D4) are connected to each other in a mirrored configuration to obtain a basic switching cell. This basic switching cell can be used to build a SPDT switch which in turn can be used to build a DPDT switch or switches of higher complexity. Thereby, high isolation and low power consumption can be achieved with the additional advantage of modularity.

Abstract: The present invention relates to a switching arrangement and method of manufacturing such an arrangement, wherein first and second series-shunt diode structures (D1/D2, D3/D4) are connected to each other in a mirrored configuration to obtain a basic switching cell. This basic switching cell can be used to build a SPDT switch which in turn can be used to build a DPDT switch or switches of higher complexity. Thereby, high isolation and low power consumption can be achieved with the additional advantage of modularity.

Abstract: An integrated circuit (10) comprises a mixer circuit (14, 54a) and a local oscillator circuit (18, 58). During testing a frequency divider circuit (32, 60) in the integrated circuit (10) divides a local oscillator signal to a frequency below a normal operating range of the local oscillator (18, 58). The integrated circuit applies the divided local oscillator signal to the mixer circuit (14, 54a) instead of the local oscillator signal during testing. Signal properties of a signal derived from the mixer circuit (14, 54a) are measured while the divided local oscillator signal is applied to the mixer circuit (14, 54a).

Abstract: In a receiver, a frequency-synthesis circuit (SYNTH) generates a stepped-frequency signal (Ssf) having a frequency which can be varied in steps. A synchronization circuit (LOOP) synchronizes a tuning oscillator (LO) with the stepped-frequency signal (Ssf). It provides an integer frequency-relationship between the stepped-frequency signal (Ssf) and the tuning oscillator (LO). That is, if the stepped-frequency signal (Ssf) has a frequency Fsf, the tuning oscillator (LO) will operate at a frequency Flo=N·Fsf, N being an integer or an integer fraction.

Abstract: In a receiver, a frequency-synthesis circuit (SYNTH) generates a stepped-frequency signal (Ssf) having a frequency which can be varied in steps. A synchronization circuit (LOOP) synchronizes a tuning oscillator (LO) with the stepped-frequency signal (Ssf). It provides an integer frequency-relationship between the stepped-frequency signal (Ssf) and the tuning oscillator (LO). That is, if the stepped-frequency signal (Ssf) has a frequency Fsf, the tuning oscillator (LO) will operate at a frequency Flo=N·Fsf, N being an integer or an integer fraction.

Abstract: In a receiver, a frequency-synthesis circuit (SYNTH) generates a stepped-frequency signal (Ssf) having a frequency which can be varied in steps. A synchronization circuit (LOOP) synchronizes a tuning oscillator (LO) with the stepped-frequency signal (Ssf). It provides an integer frequency-relationship between the stepped-frequency signal (Ssf) and the tuning oscillator (LO). That is, if the stepped-frequency signal (Ssf) has a frequency Fsf, the tuning oscillator (LO) will operate at a frequency Flo=N·Fsf, N being an integer or an integer fraction.

Abstract: Frequency synthesizers are used for down conversion of RF signals in a lot of applications, such as digital and analog radio and television receivers, car radios, etc. By combining the voltage-controlled oscillator of the phase-locked loop demodulator with the voltage-controlled oscillator of the frequency synthesizer, a major cost reduction can be achieved, but measures have to be taken to prevent that the two PLLs try to lock the same VCO to different frequencies. These measures include providing a switching circuit between the phase frequency comparator and the charging circuit, and controlling the switching circuit by using a frequency window detector.

Abstract: An RDS or RDBS radio broadcast receiver, utilizing a microcontroller and a serial communication bus, receives a list of alternative frequencies to allow the receiver to switch to an alternative frequency when the quality of the main radio broadcast signal deteriorates. Therefore the quality of the alternative frequency transmissions has to be updated from time to time. To avoid time delays caused by the relatively slow serial communication bus, the tuning section includes further controller for performing the alternative frequency updates.

Abstract: A charge pump (CP) is provides for supplying at its output (23) a first current in response to an up-pulse and sinking a second current in response to a down pulse. This charge pump includes a first circuit 200, 22, CM1) for converting the first control signal into the first current, and a second circuit (206, 208, CM2) for converting the second control signal into the second current, said the first and second circuits include circuitry means comprising means (CM1, CM2) for filtering the respective control signals. It is recognized that a charge pump does not have to supply or sink current pulses which are rectangularly shaped in order for it to properly carry out its function. In the subject charge pump invention, the current sources supply or sink current pulses are smoothly shaped because the control signals supplied to the current sources are filtered. This causes the demands on the high frequency performance of the current sources to be greatly reduced.

Abstract: A receiver, an arrangement and a method for comparing two signals, based on testing whether a first signal exhibits at least one property during a first time interval, and consecutively testing if a second signal exhibits at least one similar property during a second time interval, following the first time interval, the second time interval being in the range of 200 us to 5 ms. The assumption is made that if a first signal exhibits a certain property during a first time interval, it is likely to exhibit substantially the same property during a second time interval, following the first interval. Thus, if a second signal exhibits such a property during the second time interval, the second signal is deemed to be the same as the first signal. If both tests are positive, the two signals are determined to be the same. In this way, both signals need not be present simultaneously.