Patents by Inventor Cirino Rapisarda

Cirino Rapisarda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6551944
    Abstract: A process including the steps of: carrying out a directional etching in a semiconductor material body to form trenches having a first width; carrying out an isotropic etching of the semiconductor material body under the trenches to form cavities having a width larger than the trenches; covering the walls of the cavities with dielectric material; depositing non-conducting material different from thermal oxide to fill the cavities at least partially, so as to form a single-crystal island separated from the rest of the semiconductor material body. The isotropic etching permits the formation of at least two adjacent cavities separated by a support region of semiconductor material, which is oxidized together with the walls of the cavities to provide a support to the island prior to filling with non-conducting material.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: April 22, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Piero Giorgio Fallica, Davide Giuseppe Patti, Cirino Rapisarda
  • Patent number: 5504034
    Abstract: A method for eliminating the bird's beak from selective oxidations of semiconductor electronic devices having a semiconductor substrate (1) which is covered by a pad oxide layer (2) covered, in turn, by a first layer (3) of nitride, and wherein at least one vertical-walled pit (11) is defined for growing an isolation region, comprises the sequential steps of: selectively etching the oxide layer (2) within the pit (11) to define peripheral recesses (6,8) between the substrate (1) and the nitride; filling the recesses (6,8) with nitride; and growing oxide in the pit (11) so as to form the isolation region contrasting the nitride portions (9,10) which occlude the recesses (6,8).
    Type: Grant
    Filed: September 20, 1993
    Date of Patent: April 2, 1996
    Assignee: Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventor: Cirino Rapisarda