Patents by Inventor Claes Thelander

Claes Thelander has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10090292
    Abstract: A radial nanowire Esaki diode device includes a semiconductor core of a first conductivity type and a semiconductor shell of a second conductivity type different from the first conductivity type. The device may be a TFET or a solar cell.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: October 2, 2018
    Assignee: QUNANO AB
    Inventors: Lars-Erik Wernersson, Erik Lind, Jonas Ohlsson, Lars Samuelson, Mikeal Bjork, Claes Thelander, Anil Dey
  • Publication number: 20150171076
    Abstract: A radial nanowire Esaki diode device includes a semiconductor core of a first conductivity type and a semiconductor shell of a second conductivity type different from the first conductivity type. The device may be a TFET or a solar cell.
    Type: Application
    Filed: July 5, 2013
    Publication date: June 18, 2015
    Inventors: Lars-Erik Wernersson, Erik Lind, Jonas Ohlsson, Lars Samuelson, Mikeal Bjork, Claes Thelander, Anil Dey
  • Patent number: 8212237
    Abstract: The present invention provides a nanostructured memory device comprising at least one semiconductor nanowire (3) forming a current transport channel, one or more shell layers (4) arranged around at least a portion of the nanowire (3), and nano-sized charge trapping centers (10) embedded in said one or more shell layers (4), and one or more gate electrodes (14) arranged around at least a respective portion of said one or more shell layers (4). Preferably said one or more shell layers (4) are made of a wide band gap material or an insulator. The charge trapping centers (10) may be charged/written by using said one or more gate electrodes (14) and a change in an amount of charge stored in one or more of the charge trapping centers (10) alters the conductivity of the nanowire (3).
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: July 3, 2012
    Assignee: QuNano AB
    Inventors: Lars Samuelson, Claes Thelander, Jonas Ohlsson, Anders Mikkelsen
  • Patent number: 8143658
    Abstract: The present invention relates to a nanostructured device for charge storage. In particular the invention relates to a charge storage device that can be used for memory applications. According to the invention the device comprise a first nanowire with a first wrap gate arranged around a portion of its length, and a charge storing terminal connected to one end, and a second nanowire with a second wrap gate arranged around a portion of its length. The charge storing terminal is connected to the second wrap gate, whereby a charge stored on the charge storing terminal can affect a current in the second nanowire. The current can be related to written (charged) or unwritten (no charge) state, and hence a memory function is established.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: March 27, 2012
    Assignee: QuNano AB
    Inventors: Lars Samuelson, Claes Thelander
  • Patent number: 8063450
    Abstract: The present invention relates to vertical nanowire transistors with a wrap-gated geometry. The threshold voltage of the vertical nanowire transistors is controlled by the diameter of the nanowire, the doping of the nanowire, the introduction of segments of heterostructures in the nanowire, the doping in shell-structures surrounding the nanowire, tailoring the work function of the gate stack, by strain engineering, by control of the dielectrica or the choice of nanowire material. Transistors with varying threshold voltages are provided on the same substrate, which enables the design of advanced circuits utilizing the shifts in the threshold voltages, similar to the directly coupled field logic.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: November 22, 2011
    Assignee: QuNano AB
    Inventors: Lars-Erik Wernersson, Erik Lind, Tomas Bryllert, Jonas Ohlsson, Truls Löwgren, Lars Samuelson, Claes Thelander
  • Publication number: 20110204331
    Abstract: The present invention relates to a nanostructured device for charge storage. In particular the invention relates to a charge storage device that can be used for memory applications. According to the invention the device comprise a first nanowire with a first wrap gate arranged around a portion of its length, and a charge storing terminal connected to one end, and a second nanowire with a second wrap gate arranged around a portion of its length. The charge storing terminal is connected to the second wrap gate, whereby a charge stored on the charge storing terminal can affect a current in the second nanowire. The current can be related to written (charged) or unwritten (no charge) state, and hence a memory function is established.
    Type: Application
    Filed: March 26, 2008
    Publication date: August 25, 2011
    Inventors: Lars Samuelson, Claes Thelander
  • Publication number: 20110140086
    Abstract: The present invention provides a nanostructured memory device comprising at least one semiconductor nanowire (3) forming a current transport channel, one or more shell layers (4) arranged around at least a portion of the nanowire (3), and nano-sized charge trapping centres (10) embedded in said one or more shell layers (4), and one or more gate electrodes (14) arranged around at least a respective portion of said one or more shell layers (4). Preferably said one or more shell layers (4) are made of a wide band gap material or an insulator. The charge trapping centres (10) may be charged/written by using said one or more gate electrodes (14) and a change in an amount of charge stored in one or more of the charge trapping centres (10) alters the conductivity of the nanowire (3).
    Type: Application
    Filed: July 2, 2009
    Publication date: June 16, 2011
    Applicant: QuNano AB
    Inventors: Lars Samuelson, Claes Thelander, Jonas Ohlsson, Anders Mikkelsen
  • Patent number: 7826336
    Abstract: The present invention relates to a device for data storage. In particular the invention relates to a single electron memory device utilizing multiple tunnel junctions, and arrays or matrixes of such devices. The data storage device according to the invention comprises at least one nanowhisker adapted to store a charge. Each of the nanowhiskers comprises a sequence of axial segments of materials of different band gaps, arranged to provide a sequence of conductive islands separated by tunnel barriers and a storage island arranged at one end of the conductive island/tunnel barrier sequence, whereby to provide a data storage capability. The number of conductive islands should preferably be between five and ten.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: November 2, 2010
    Assignee: QuNano AB
    Inventors: Claes Thelander, Lars Samuelson
  • Publication number: 20100176459
    Abstract: The present invention relates to vertical nanowire transistors with a wrap-gated geometry. The threshold voltage of the vertical nanowire transistors is controlled by the diameter of the nanowire, the doping of the nanowire, the introduction of segments of heterostructures in the nanowire, the doping in shell-structures surrounding the nanowire, tailoring the work function of the gate stack, by strain engineering, by control of the dielectrica or the choice of nanowire material. Transistors with varying threshold voltages are provided on the same substrate, which enables the design of advanced circuits utilizing the shifts in the threshold voltages, similar to the directly coupled field logic.
    Type: Application
    Filed: September 19, 2007
    Publication date: July 15, 2010
    Inventors: Lars-Erik Wernersson, Erik Lind, Tomas Bryllert, Jonas Ohlsson, Truls Löwgren, Lars Samuelson, Claes Thelander
  • Publication number: 20070206488
    Abstract: The present invention relates to a device for data storage. In particular the invention relates to a single electron memory device utilizing multiple tunnel junctions, and arrays or matrixes of such devices. The data storage device according to the invention comprises at least one nanowhisker adapted to store a charge. Each of the nanowhiskers comprises a sequence of axial segments of materials of different band gaps, arranged to provide a sequence of conductive islands separated by tunnel barriers and a storage island arranged at one end of the conductive island/tunnel barrier sequence, whereby to provide a data storage capability. The number of conductive islands should preferably be between five and ten.
    Type: Application
    Filed: February 23, 2006
    Publication date: September 6, 2007
    Inventors: Claes Thelander, Lars Samuelson