Patents by Inventor Claire Laporte

Claire Laporte has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11756874
    Abstract: An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: September 12, 2023
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
    Inventors: David Auchere, Claire Laporte, Deborah Cogoni, Laurent Schwartz
  • Publication number: 20230015669
    Abstract: An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.
    Type: Application
    Filed: September 15, 2022
    Publication date: January 19, 2023
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
    Inventors: David AUCHERE, Claire LAPORTE, Deborah COGONI, Laurent SCHWARTZ
  • Publication number: 20220415822
    Abstract: A support substrate has a mounting face and a connection face opposite to the mounting face. An electronic chip is mounted to the mounting face and a matrix of connectors is mounted to the connection face. The support substrate includes an interconnection structure formed by a pair of conductive interconnection tracks that electrically connect the electronic chip to the matrix of connectors and circulate differential signals. The two interconnection tracks of the pair of conductive interconnection tracks extend facing each other at different depths of the support substrate. An isolation structure in the support substrate laterally isolates the pair of conductive interconnection tracks. Isolation plates above and below the pair of conductive interconnection tracks provide further isolation.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 29, 2022
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
    Inventors: Claire LAPORTE, Laurent SCHWARTZ, Godfrey DIMAYUGA
  • Patent number: 11482487
    Abstract: An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.
    Type: Grant
    Filed: October 6, 2020
    Date of Patent: October 25, 2022
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
    Inventors: David Auchere, Claire Laporte, Deborah Cogoni, Laurent Schwartz
  • Publication number: 20220028844
    Abstract: A device for regulating a voltage of an electric current supplying an integrated circuit resting on a substrate. The integrated circuit comprises a ground terminal and a power supply terminal able to receive the electric current. The regulation device comprises a first cover covering the integrated circuit, a second cover covering the integrated circuit. The first cover is electrically connected to the power supply terminal of the integrated circuit. The second cover is electrically connected to the ground terminal of the integrated circuit. The first cover and the second cover are connected together by a capacitive connection.
    Type: Application
    Filed: July 13, 2021
    Publication date: January 27, 2022
    Applicants: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (ALPS) SAS
    Inventors: Deborah COGONI, David AUCHERE, Laurent SCHWARTZ, Claire Laporte
  • Publication number: 20210104457
    Abstract: An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.
    Type: Application
    Filed: October 6, 2020
    Publication date: April 8, 2021
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
    Inventors: David AUCHERE, Claire LAPORTE, Deborah COGONI, Laurent SCHWARTZ
  • Patent number: 9240766
    Abstract: A coupling circuit, including: a coupler including a first conductive line and a second conductive line coupled to the first one; at each end of the second line of the coupler, a two-output signal splitter; and at each output of each splitter, a filtering function.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: January 19, 2016
    Assignee: STMICROELECTRONICS (TOURS) SAS
    Inventors: Claire Laporte, Hilal Ezzeddine
  • Patent number: 9117693
    Abstract: A passive integrated circuit formed on a substrate, including contact areas of a conductive material specifically capable of receiving bonding pads, wherein the conductive material further creates connections between regions of a lower metallization level.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: August 25, 2015
    Assignee: STMICROELECTRONICS (TOURS) SAS
    Inventors: Claire Laporte, Hilal Ezzeddine
  • Publication number: 20140292614
    Abstract: A coupling circuit, including: a coupler including a first conductive line and a second conductive line coupled to the first one; at each end of the second line of the coupler, a two-output signal splitter; and at each output of each splitter, a filtering function.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 2, 2014
    Applicant: STMicroelectronics (Tours) SAS
    Inventors: Claire Laporte, Hilal Ezzeddine
  • Patent number: 8810333
    Abstract: A multiband coupling circuit including: a number of paths equal to the number of frequency bands, each path having a first terminal and a second terminal; a third terminal and a fourth terminal; a number of distributed couplers equal to the number of paths, all couplers being identical and sized according to the highest frequency band, and each coupler including a first conductive line between first and second ports connected to the first and second terminals of the concerned path, and a second conductive line coupled to the first one between third and fourth ports; a first set of attenuations between the third ports of the couplers and the third terminal of the circuit; and an array of filters between the fourth ports of the coupler and the fourth terminal of the circuit.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: August 19, 2014
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Claire Laporte, Hilal Ezzeddine
  • Patent number: 8797121
    Abstract: A distributed coupler including a first line intended to convey a radio signal between its two ends and a second line intended to sample, by coupling, part of the signal, wherein: one of the lines is formed on an insulating substrate; and the other line is formed in a lead frame supporting the substrate, one line being above the other.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: August 5, 2014
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Hilal Ezzeddine, Claire Laporte
  • Patent number: 8384494
    Abstract: A distributed multiband coupling circuit including: a number n of first and of second terminals equal to the number of frequency bands; a third terminal and a fourth terminal; a number n of distributed couplers equal to the number of frequency bands, all couplers being identical and sized according to the highest frequency band, and each coupler including a first conductive line between first and second ports intended to convey a signal to be transmitted in the concerned frequency band, and a second conductive line coupled to the first one between third and fourth ports; a first set of resistive splitters in cascade between the third ports of the couplers, a terminal of the splitter associated with the first coupler being connected to the third terminal of the coupling circuit; and a second set of resistive splitters in cascade between the fourth ports of the couplers, a terminal of the splitter associated with the first coupler being connected to the fourth terminal of the coupling circuit.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: February 26, 2013
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Claire Laporte, Hilal Ezzeddine
  • Patent number: 8299869
    Abstract: A balun including on the common-mode side, an inductive element in series with a first capacitive element between a first common-mode access terminal and the ground; and on the differential-mode side, two inductive windings in series having first respective ends defining differential access terminals and having second common ends connected to ground, second capacitive elements being respectively connected in parallel on the differential-mode windings.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: October 30, 2012
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Claire Laporte, Hilal Ezzeddine
  • Publication number: 20120122410
    Abstract: A multiband coupling circuit including: a number of paths equal to the number of frequency bands, each path having a first terminal and a second terminal; a third terminal and a fourth terminal; a number of distributed couplers equal to the number of paths, all couplers being identical and sized according to the highest frequency band, and each coupler including a first conductive line between first and second ports connected to the first and second terminals of the concerned path, and a second conductive line coupled to the first one between third and fourth ports; a first set of attenuations between the third ports of the couplers and the third terminal of the circuit; and an array of filters between the fourth ports of the coupler and the fourth terminal of the circuit.
    Type: Application
    Filed: September 15, 2011
    Publication date: May 17, 2012
    Applicant: STMicroelectronics (Tours) SAS
    Inventors: Claire Laporte, Hilal Ezzeddine
  • Publication number: 20120062333
    Abstract: A distributed coupler including a first line intended to convey a radio signal between its two ends and a second line intended to sample, by coupling, part of the signal, wherein: one of the lines is formed on an insulating substrate; and the other line is formed in a lead frame supporting the substrate, one line being above the other.
    Type: Application
    Filed: September 8, 2011
    Publication date: March 15, 2012
    Applicant: STMicroelectronics (Tours) SAS
    Inventors: Hilal Ezzeddine, Claire Laporte
  • Publication number: 20110304014
    Abstract: A passive integrated circuit formed on a substrate, including contact areas of a conductive material specifically capable of receiving bonding pads, wherein the conductive material further creates connections between regions of a lower metallization level.
    Type: Application
    Filed: June 8, 2011
    Publication date: December 15, 2011
    Applicant: STMicroelectronics (Tours) SAS
    Inventors: Claire Laporte, Hilal Ezzeddine
  • Publication number: 20110001575
    Abstract: A distributed multiband coupling circuit including: a number n of first and of second terminals equal to the number of frequency bands; a third terminal and a fourth terminal; a number n of distributed couplers equal to the number of frequency bands, all couplers being identical and sized according to the highest frequency band, and each coupler including a first conductive line between first and second ports intended to convey a signal to be transmitted in the concerned frequency band, and a second conductive line coupled to the first one between third and fourth ports; a first set of resistive splitters in cascade between the third ports of the couplers, a terminal of the splitter associated with the first coupler being connected to the third terminal of the coupling circuit; and a second set of resistive splitters in cascade between the fourth ports of the couplers, a terminal of the splitter associated with the first coupler being connected to the fourth terminal of the coupling circuit.
    Type: Application
    Filed: June 23, 2010
    Publication date: January 6, 2011
    Applicant: STMicroelectronics (Tours) SAS
    Inventors: Claire Laporte, Hilal Ezzeddine
  • Publication number: 20100167667
    Abstract: A balun including on the common-mode side, an inductive element in series with a first capacitive element between a first common-mode access terminal and the ground; and on the differential-mode side, two inductive windings in series having first respective ends defining differential access terminals and having second common ends connected to ground, second capacitive elements being respectively connected in parallel on the differential-mode windings.
    Type: Application
    Filed: December 28, 2009
    Publication date: July 1, 2010
    Applicant: STMicroelectronics (Tours) SAS
    Inventors: Claire Laporte, Hilal Ezzeddine