Abstract: An interface circuit (1) for facilitating communication between an integrated circuit (2) and an external device (not shown) in either SPI protocol or one or both of I2C and SMBus protocols, comprises a signal processing circuit (7), which is configurable in I2C/SMBus and SPI protocol modes, and four communication terminals, namely, a CLK pin (3), and ADD/DOUT pin (4), and SDA/DIN pin (5) and a {overscore (CE)} pin (6). On power-up of the interface circuit (1) the signal processing circuit (7) is configured in I2C/SMBus protocol mode by a first mode select signal (Vdd) applied to a mode select input port (10) by a multiplexer (15) in response to a logic low switch signal from a switch signal flip-flop (22). A first state machine (20) outputs a logic low signal to an AND gate (21) for so long as the {overscore (CE)} pin (6) remains continuously high or low, thus holding a reset input of the switch signal flip-flop (22) low.