Abstract: Various embodiments include methods and devices for implementing decompression of compressed high dynamic ratio fields. Various embodiments may include receiving compressed first and second sets of data fields, decompressing the first and second compressed sets of data fields to generate first and second decompressed sets of data fields, receiving a mapping for mapping the first and second decompressed sets of data fields to a set of data units, aggregating the first and second decompressed sets of data fields using the mapping to generate a compression block comprising the set of data units.

Abstract: Various embodiments include methods and devices for implementing decompression of compressed high dynamic ratio fields. Various embodiments may include receiving compressed first and second sets of data fields, decompressing the first and second compressed sets of data fields to generate first and second decompressed sets of data fields, receiving a mapping for mapping the first and second decompressed sets of data fields to a set of data units, aggregating the first and second decompressed sets of data fields using the mapping to generate a compression block comprising the set of data units.

Abstract: Various embodiments include methods and devices for implementing compression of high dynamic ratio fields. Various embodiments may include receiving a compression block having data units, receiving a mapping for the compression block, wherein the mapping is configured to map bits of each data unit to two or more data fields to generate a first set of data fields and a second set of data fields, compressing the first set of data fields together to generate a compressed first set of data fields, and compressing the second set of data fields together to generate a compressed second set of data fields.

Abstract: Various embodiments include methods and devices for implementing compression of high dynamic ratio fields. Various embodiments may include receiving a compression block having data units, receiving a mapping for the compression block, wherein the mapping is configured to map bits of each data unit to two or more data fields to generate a first set of data fields and a second set of data fields, compressing the first set of data fields together to generate a compressed first set of data fields, and compressing the second set of data fields together to generate a compressed second set of data fields.

Abstract: Various embodiments of methods and systems for managing compressed data transaction sizes in a system on a chip (“SoC”) in a portable computing device (“PCD”) are disclosed. Based on lengths of compressed data tiles associated in a group, wherein the compressed data tiles are comprised within a compressed image file, multiple compressed data tiles may be aggregated into a single, multi-tile transaction. A metadata file may be generated in association with the single multi-tile transaction to identify the transaction as a multi-tile transaction and provide offset data to distinguish data associated with the compressed data tiles. Using the metadata, embodiments of the solution may provide for random access and modification of the compressed data stored in association with a multi-tile transaction.

Abstract: According to certain aspects, an apparatus for decoding video data includes a memory and a processor configured to: receive a bitstream including a plurality of prefixes and a plurality of suffixes associated with the plurality of prefixes, the plurality of prefixes and the plurality of suffixes used in variable length coding (VLC), each of the plurality of prefixes indicative of a length of one or more of the plurality of suffixes, each of the plurality of suffixes representing a color component of a pixel in a block, the block including a plurality of pixels, wherein all of the plurality of prefixes precede all of the plurality of suffixes; decode at least some of the plurality of prefixes; and subsequent to decoding at least some of the plurality of prefixes, decode at least some of the plurality of suffixes associated with the at least some of the plurality of prefixes.

Abstract: System and method for reading and writing pixel aligned subframes from a frame buffer in a parallel processing system are disclosed. Optimal bandwidth access of the frame buffer requires that data be moved in bursts having multiple data words. Subframes are specified at X and Y locations within the image frame with a resolution of one pixel. In addition, subframes within a row may overlap each other and consecutive subframe rows may also overlap. Memory control logic of the invention provides pixel packing and unpacking and storing selected pixel data in a cache memory. Reading and writing to the frame buffer is provided in a manner that makes optimal use of the frame buffer internal architecture. Other capabilities of the memory control logic include decimation of pixel data during input, suppression of redundant frame buffer writes, and accessing image frame data in an interlaced manner.