Abstract: A high performance cathode ray tube (CRT) display monitor is capable of operating at a rate of 50,000 horizontal scans per second. The monitor receives vertical sync, horizontal blank, and video input signals. The vertical sync signal is supplied to an integrated circuit vertical deflection system which produces vertical deflection signals (for the vertical yoke) and vertical blank signals. The horizontal blank signal is supplied to an integrated circuit phase lock loop which includes a phase comparator and a voltage controlled oscillator (VCO). The output of the VCO is amplified to produce horizontal deflection signal pulses (for the horizontal yoke). The horizontal retrace signal pulses are supplied to a comparator input of the phase lock loop, and are compared with the horizontal blank signal.