Abstract: Methods and systems are provided for assessing a medical ultrasound imaging operator's competency. The system includes a console containing a plurality of virtual controls, such as knobs, for simulating a real-life examination of a patient. The images created by the system change dynamically as the different virtual knobs on the console are adjusted. The console provides a certification examination for a medical ultrasound imaging operator. The console also includes a process to assess the medical ultrasound imaging operator's competency. The process determines a plurality of scores in order to assess the competency of the medical ultrasound imaging operator.

Abstract: Methods and systems are provided for assessing a medical ultrasound imaging operator's competency. The system includes a console containing a plurality of virtual controls, such as knobs, for simulating a real-life examination of a patient. The images created by the system change dynamically as the different virtual knobs on the console are adjusted. The console provides a certification examination for a medical ultrasound imaging operator. The console also includes a process to assess the medical ultrasound imaging operator's competency. The process determines a plurality of scores in order to assess the competency of the medical ultrasound imaging operator.

Abstract: A visual indication for a motor controlled shaft, especially useful for retrofitting hand controlled printing presses.

Abstract: A quick disconnect motor mount for use with hand operated adjustment wheels, such as used in a printing press.

Abstract: A controller for motor activation providing accurate and repeatable position changes by pressing and releasing a push button switch. Repeatable position changes are made in an advance direction by triggering a digital counter for a predetermined number of cycles of a reference clock signal. Backlash in retard motion of the motor is reduced by similarly asserting a retard motor input for an amount of time determined by another digital counter with a following advance correction made automatically after the retard signal is applied, by applying a predetermined retard-advance movement amount, as again counted by a digital counter. The advance binary amount, the retard binary amount and the retard-advance binary amount of set through binary switch inputs to respective counters to count the respective time periods (TG3, TG1, and TG2).

Abstract: A controller for motor activation providing accurate and repeatable position changes by pressing and releasing a push button switch. Repeatable position changes are made in an advance direction by triggering a digital counter for a predetermined number of cycles of a reference clock signal. Backlash in retard motion of the motor is reduced by similarly asserting a retard motor input for an amount of time determined by another digital counter with a following advance correction made automatically after the retard signal is applied, by applying a predetermined retard-advance movement amount, as again counted by a digital counter. The advance binary amount, the retard binary amount and the retard-advance binary amount of set through binary switch inputs to respective counters to count the respective time periods (TG3, TG1, and TG2).

Abstract: A system and method for storing and controlling the position of an adjustable position motor for later recall and use. The system includes a mechanism for causing an adjustable position motor to be adjusted to least a first preset position. Subsequently, the system electronically determines the first preset position by setting a first counter value while the motor is in the first preset position and subsequently causes the motor to move to a zero or null position wherein a second counter value is established. By subtracting or comparing the first counter value with the second counter value, a positional value for the motor in the first preset position can be established. The positional value is stored, for later recall, and associated with a label such as a job name or number. The system also includes a mechanism by which the motor position information may be recalled, using the associated label.

Abstract: An improved data sampling system for sampling data transmission in a computer system includes a reference clock, a delay locked loop circuit, a packet enable circuit, a delayed selector control circuit, a sample selector, and a sample circuit. The devices may be constructed on a single semiconductor substrate and may be connected to a bus structure having a microcomputer and a plurality of boards coupled to it. The delay locked loop circuit generates accurate delayed clock signals based on the reference clock. A positive edge synchronizer circuit, within the delay locked loop, serves as a programmable phase adjust for the sampling system. The positive edge synchronizer ensures proper phase relationship between the chosen delayed clock signal and the incoming data across semiconductor process variations. Packet enable circuit informs the delayed control circuit and the sample circuit when a start bit or stop bit is initiated in a data packet and enables those circuit blocks accordingly.

Abstract: A support apparatus for use during disassembly and reassembly of a vehicular radiator is provided. The support apparatus includes vertically adjustable and rotatable generally horizontal supports and rotatable supports. Adjustable heating elements provide for use of the support apparatus with various size radiators.

Abstract: A memory input signal dynamic logic buffer circuit for providing FET level complementary output signals in response to low level input signals. The circuit is compatible with a variety of bipolar transistor driving logic families as the input signal sensitivity may set external to the circuit. The circuit includes a cross-coupled dynamic latch responsive to gated input and reference signals. Voltage boosting capacitors coupled to the latch nodes provide for simultaneous setting of the latch and boosting of the output nodes, which are connected to dynamic output driver circuits.

Abstract: A differential sense amplifier for semiconductor memory cells is described which uses charge transfer preamplification in combination with a ratioless cross-coupled latch circuit to provide sensing and regeneration of binary information stored in a charge storage device. The sense amplifier may be utilized in arrays of single FET/capacitor memory cells in which the sense amplifier is centrally located and data input/output connections are made at one outside edge of the array. Single bit line driving is made possible by the use of a bit decoder which unconditionally couples charge to a single bit line common mode charge coupling to decrease potentials on a pair of bit lines coupled to the sense amplifier. The common mode bit line discharge means also increases response of the charge transfer preamplifier stage. A single transmission gate device is used for both reading out from a single bit line and writing new data into a memory cell, thus simplifying the input/output circuitry.