Patents by Inventor Clarence S. Smith

Clarence S. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240085623
    Abstract: According to various embodiments, an array of elements forms an artificially-structured material. The artificially-structured material can also include an array of tuning mechanisms included as part of the array of elements that are configured to change material properties of the artificially-structured material on a per-element basis. The tuning mechanisms can change the material properties of the artificially-structured material by changing operational properties of the elements in the array of elements on a per-element basis based on one or a combination of stimuli detected by sensors included in the array of tuning mechanisms, programmable circuit modules included as part of the array of tuning mechanisms, data stored at individual data stores included as part of the array of tuning mechanisms, and communications transmitted through interconnects included as part of the array of elements.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 14, 2024
    Inventors: Daniel Arnitz, Patrick Bowen, Seyedmohammadreza Faghih Imani, Joseph Hagerty, Roderick A. Hyde, Edward K.Y. Jung, Guy S. Lipworth, Nathan P. Myhrvold, David R. Smith, Clarence T. Tegreene, Yaroslav A. Urzhumov, Lowell L. Wood, JR.
  • Patent number: 5550736
    Abstract: A flight critical computer system for an aircraft includes dual independent lanes having two processors in each lane. The first lane has a primary processor and a redundant processor and provides a first command signal. The second lane includes a primary processor and a redundant processor and provides a second command signal. A first monitor compares the primary processor of the first lane with the primary processor of the second lane and generates first comparison signals as a function of disagreement therebetween. A second monitor compares the output signals of the redundant processor of the second lane and the primary processor of the first lane and generates second comparison signals as a function of disagreement therebetween. A third monitor compares the primary processor of the second lane with the redundant processor of the first lane and generates third comparison signals as a function of disagreement therebetween.
    Type: Grant
    Filed: April 27, 1993
    Date of Patent: August 27, 1996
    Assignee: Honeywell Inc.
    Inventors: Rick H. Hay, Clarence S. Smith, Robert D. Girts, Larry J. Yount
  • Patent number: 5163049
    Abstract: An improved distributed processing system for controlling the transfer of data between a terminal controller and a subsystem is described where the improvement insures wordstring consistency in a manner which is completely transparent to the subscriber subsystem. In particular, data is transferred, via a dual-bank, dual-port terminal memory where the bank selection is controlled such that any wordstring transfers between the terminal memory and the terminal controller are constrained to involve a different bank than transfers between the terminal memory and its associated subscriber subsystem. A wordstring log associated with control arbitration logic contains the dynamic state of the bank assignments for each wordstring. Two flag bits in the wordstring log provide information to the control/arbitration logic, allowing it to manage the bank selection of the terminal memory.
    Type: Grant
    Filed: August 10, 1990
    Date of Patent: November 10, 1992
    Assignee: Honeywell Inc.
    Inventors: Clarence S. Smith, Larry J. Yount