Abstract: A sampling circuit and method therefor including a first Josephson junction or producing a series of sampling pulses for activating a second Josephson junction that is receptive of both the analog current signal being sampled and a bias current. The first Josephson junction is continually triggered at a fixed time relative to the repetitive analog signal to provide a series of sampling pulses and before each sampling pulse the bias level to the second Josephson junction is changed until the sum of the current from the sampling pulse, from the analog signal, and from the bias source exceeds the critical current value of the second Josephson junction causing it to switch from one voltage state to another. The value of the bias current at the point of switching is proportional to the current in the analog signal.In one embodiment, the bias current is increased in a step-like fashion for each sampling pulse from the first Josephson junction until the critical value of the second Josephson junction is reached.