Patents by Inventor Claude Berard

Claude Berard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4547861
    Abstract: A combined logic signal generator enables combination of p output signals at logic level 1 and N-p output signals at the logic level 0 among N outputs (QP1, . . . QPN) of the generator on which the p logic signals of level 1 and N-p logic signals of level 0 are available with Np being constant. The generator utilizes an assembly (P) of N storage parts (P1, P2, . . . PN) and a device CH for introducing into the storage means P1, P2 . . . PN the logic levels of signals corresponding to a predetermined combination and a control means M to manage the storage means of the assembly P to obtain all the combinations which follow the predetermined starting combination. Lastly, the system utilizes a device A for stopping the generation of the combinations after a second predetermined combination.
    Type: Grant
    Filed: January 25, 1982
    Date of Patent: October 15, 1985
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Andre Laviron, Claude Berard
  • Patent number: 4520309
    Abstract: The invention relates to a system for testing the malfunctioning or correct operation of a circuit with n logic components. These components respectively present a simulation input receiving a malfunctioning or correct operation simulation signal. The system is characterized in that it comprises test means for placing each component respectively in a state of malfunctioning or of correct operation and vice versa, for one or more combinations of the components of the circuit, the test means present a characteristic output which furnishes a signal of which the logic level depends on the state of malfunctioning or of correct operation and vice versa, of each of the components of the circuit. Finally, the system comprises stop means for stopping the test means when the tests to be carried out are finished. The invention is more particularly applied to tests of electronic circuits and, by analogy, to tests of hydraulic circuits.
    Type: Grant
    Filed: March 5, 1982
    Date of Patent: May 28, 1985
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Andre Laviron, Claude Berard