Patents by Inventor Claude Renous

Claude Renous has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100289472
    Abstract: The disclosure relates to a low dropout voltage regulator comprising a regulation transistor to supply an output voltage from an input voltage, a gate control stage to supply a gate voltage to the regulation transistor, and an error amplifier to supply a control voltage to a control terminal of a control transistor. The low dropout voltage regulator also comprises a quiescent current control circuit to limit a quiescent current flowing through the gate control stage when the input voltage approaches the output voltage and causes the regulation transistor to enter into an ohmic conduction mode. The quiescent current control circuit comprises a current source providing a reference current and is configured to control the quiescent current by current-mirror effect based upon the reference current.
    Type: Application
    Filed: May 14, 2010
    Publication date: November 18, 2010
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Claude Renous
  • Patent number: 7612547
    Abstract: A voltage regulation circuit intended to generate a regulated voltage for an electronic device, comprising: a transconductance amplifier based on a pair of MOS type differential amplifiers, said amplifier having a first input onto which a reference potential is applied and a second input onto which a counter reaction of said regulated voltage is input; a follower stage connected to the output from said transconductance amplifier; a MOS type transistor that will be used to make the output stage of the regulation circuit with a source connected to a first power supply potential. The transconductance amplifier comprises a resistive load 360 with a profile in K/gm, where gm is the transconductance coefficient of said input differential pair, said resistive load being connected to said first power supply potential.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: November 3, 2009
    Assignee: STMicroelectronics S.A.
    Inventor: Claude Renous
  • Patent number: 7453249
    Abstract: An integrated circuit including at least one low-dropout voltage regulator (LDO) capable of delivering a regulated output voltage using a reference voltage (VREF), comprises means for generating a substitution voltage (VRMP) in the form of a ramp and control means capable of replacing the reference voltage (VREF) by the substitution voltage as long as the substitution voltage (VRMP) is lower than the reference voltage (VREF).
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: November 18, 2008
    Assignee: STMicroelectronics SA
    Inventors: Kuno Lenz, Claude Renous, Jean-Luc Patry
  • Publication number: 20070188228
    Abstract: A voltage regulation circuit intended to generate a regulated voltage for an electronic device, comprising: a transconductance amplifier based on a pair of MOS type differential amplifiers, said amplifier having a first input onto which a reference potential is applied and a second input onto which a counter reaction of said regulated voltage is input; a follower stage connected to the output from said transconductance amplifier; a MOS type transistor that will be used to make the output stage of the regulation circuit with a source connected to a first power supply potential. The transconductance amplifier comprises a resistive load 360 with a profile in K/gm, where gm is the transconductance coefficient of said input differential pair, said resistive load being connected to said first power supply potential.
    Type: Application
    Filed: January 9, 2007
    Publication date: August 16, 2007
    Applicant: STMICROELECTRONICS S.A.
    Inventor: Claude Renous
  • Publication number: 20060006857
    Abstract: An integrated circuit including at least one low-dropout voltage regulator (LDO) capable of delivering a regulated output voltage using a reference voltage (VREF), comprises means for generating a substitution voltage (VRMP) in the form of a ramp and control means capable of replacing the reference voltage (VREF) by the substitution voltage as long as the said substitution voltage (VRMP) is lower than the said reference voltage (VREF).
    Type: Application
    Filed: June 24, 2005
    Publication date: January 12, 2006
    Applicant: STMICROELECTRONICS SA
    Inventors: Kuno Lenz, Claude Renous, Jean-Luc Patry
  • Patent number: 6928158
    Abstract: A method and a circuit for regenerating a clock signal based on a flip-flop and on two complementary signals at the clock rate, the flip-flop being assembled as a divider by two of a combination of shaping signals each translating a direction, respectively rising or falling, of the edges of one of the complementary signals, and one of said shaping signals being used to reset the flip-flop.
    Type: Grant
    Filed: October 17, 2000
    Date of Patent: August 9, 2005
    Assignee: STMicroelectronics S.A.
    Inventors: Christian Fraisse, Claude Renous
  • Patent number: 6741132
    Abstract: A low noise differential amplifier structure comprising a first amplifier provided with an output stage with a Miller capacitor having a first electrode and a second electrode connected to the input and the output of the output stage, respectively. A second amplifier is provided with an output stage with a Miller capacitor having a first electrode and a second electrode connected to the input and the output of the output stage, respectively. The structure is characterized in that it comprises: at least a first trimming capacitor having a first electrode connected to the first electrode of the first Miller capacitor; at least a second trimming capacitor having a first electrode connected to the first electrode of the second Miller capacitor; and a cascode stage having an input receiving the output common mode voltage and an output connected to the second electrode of the first and second trimming capacitors.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: May 25, 2004
    Assignee: STMicroelectronics S.A.
    Inventors: Claude Renous, Kuno Lenz
  • Patent number: 6717467
    Abstract: A wideband differential amplifier includes a first differential stage connected to a Miller stage allowing an open-loop gain increase. The Miller stage includes a current source and a resistive-capacitive network causing a feedback into the current source. The feedback includes a portion of a Miller stage output signal having a high frequency range to move a bias point of the current source within the high frequency range. Thus, a gain of the Miller stage significantly increases towards the bias point.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: April 6, 2004
    Assignee: STMicroelectronics S.A.
    Inventors: Claude Renous, François Van-Zanten
  • Patent number: 6703898
    Abstract: A differential amplifier may include a first stage including a first transistor and a second transistor having the same polarity and assembled to constitute a differential amplifier. The first stage may be supplied by first and second mirror current sources. The differential amplifier may further include a common mode control circuit, which may include two inputs receiving a reference voltage VCM and a common mode voltage controlling the first and second mirror current sources, respectively. The differential amplifier may further include a Miller gain stage having inputs and for a setting gain-band product. The differential amplifier may further include an unlocking circuit, inserted between the common mode voltage and the Miller gain stage inputs, to cause the Miller gain stage to conduct on circuit start-up.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: March 9, 2004
    Assignee: STMicroelectronics SA
    Inventor: Claude Renous
  • Publication number: 20030137351
    Abstract: A low noise differential amplifier structure comprising a first amplifier provided with an output stage with a Miller capacitor having a first electrode and a second electrode connected to the input and the output of the output stage, respectively. A second amplifier is provided with an output stage with a Miller capacitor having a first electrode and a second electrode connected to the input and the output of the output stage, respectively. The structure is characterized in that it comprises: at least a first trimming capacitor having a first electrode connected to the first electrode of the first Miller capacitor; at least a second trimming capacitor having a first electrode connected to the first electrode of the second Miller capacitor; and a cascode stage having an input receiving the output common mode voltage and an output connected to the second electrode of the first and second trimming capacitors.
    Type: Application
    Filed: December 12, 2002
    Publication date: July 24, 2003
    Applicant: STMicroelectronics S.A.
    Inventors: Claude Renous, Kuno Lenz
  • Patent number: 6566935
    Abstract: A power supply circuit receiving several supply voltages on respective switches, at least one of the switches being a first PMOS transistor connected between one of the supply voltages and a common output terminal, this switch being associated with a second PMOS transistor connected between the gate of the first transistor and a power supply node maintained at the highest of the other supply voltages, with a third NMOS transistor, which is less conductive in the on state than the second transistor, connected between the gate of the first transistor and the ground, and with a fourth PMOS transistor having its source connected to the power supply line of the switch and its drain connected to ground via a current source, and to the gates of the second, third, and fourth transistors.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: May 20, 2003
    Assignee: STMicroelectronics S.A.
    Inventor: Claude Renous
  • Publication number: 20020167357
    Abstract: A differential amplifier may include a first stage including a first transistor and a second transistor having the same polarity and assembled to constitute a differential amplifier. The first stage may be supplied by first and second mirror current sources. The differential amplifier may further include a common mode control circuit, which may include two inputs receiving a reference voltage VCM and a common mode voltage controlling the first and second mirror current sources, respectively. The differential amplifier may further include a Miller gain stage having inputs and for a setting gain-band product. The differential amplifier may further include an unlocking circuit, inserted between the common mode voltage and the Miller gain stage inputs, to cause the Miller gain stage to conduct on circuit start-up.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 14, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Claude Renous
  • Publication number: 20020167356
    Abstract: A wideband differential amplifier includes a first differential stage connected to a Miller stage allowing an open-loop gain increase. The Miller stage includes a current source and a resistive-capacitive network causing a feedback into the current source. The feedback includes a portion of a Miller stage output signal having a high frequency range to move a bias point of the current source within the high frequency range. Thus, a gain of the Miller stage significantly increases towards the bias point.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 14, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Claude Renous, Francois Van-Zanten
  • Patent number: 6346799
    Abstract: A voltage regulator with a current limiter includes a voltage regulating circuit including an amplifier circuit and a feedback circuit. The amplifier circuit includes a ballast or pass resistor and the feedback circuit supplies a first feedback voltage to the amplifier circuit, which is compared to a reference voltage. The voltage regulator further includes a current limiter circuit including a current limiter transistor in series with the ballast transistor and an output of the voltage regulator and a feedback circuit supplying a second feedback voltage to a controller for controlling the current limiter transistor. The controller causes the current limiter transistor to operate between saturation and blocking conditions depending on whether the second feedback voltage, which is representative of the output of the voltage regulator, is above or below a predetermined threshold voltage.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: February 12, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Claude Renous
  • Publication number: 20010005129
    Abstract: A voltage regulator with a current limiter includes a voltage regulating circuit including an amplifier circuit and a feedback circuit. The amplifier circuit includes a ballast or pass resistor and the feedback circuit supplies a first feedback voltage to the amplifier circuit, which is compared to a reference voltage. The voltage regulator further includes a current limiter circuit including a current limiter transistor in series with the ballast transistor and an output of the voltage regulator and a feedback circuit supplying a second feedback voltage to a controller for controlling the current limiter transistor. The controller causes the current limiter transistor to operate between saturation and blocking conditions depending on whether the second feedback voltage, which is representative of the output of the voltage regulator, is above or below a predetermined threshold voltage.
    Type: Application
    Filed: December 11, 2000
    Publication date: June 28, 2001
    Applicant: STMicroelectronics S.A.
    Inventor: Claude Renous
  • Patent number: 5777463
    Abstract: A device for automatically adapting to the impedance of a supply line to optimally supply a load. The device includes a switched mode voltage regulator from which is drawn a signal to be provided to the load, a regulation loop to adjust the amplitude of the signal to be provided to the load as a function of the line voltage, and means for aligning the output voltage of the voltage regulator with the amplitude of the signal provided to the load.
    Type: Grant
    Filed: December 26, 1996
    Date of Patent: July 7, 1998
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Claude Renous
  • Patent number: 4847724
    Abstract: The circuit relates to the protection of some integrated circuits connected with transmission lines and therefore liable to be subject to overvoltages. The protection comprises diodes (D1, D2, D3). Those diodes switch towards an internal supply conductor (CA) either the external supply voltage VBAT, or the overvoltage possibly present on an output terminal (A) if said overvoltage is higher than the internal supply voltage. The diodes have a special structure, that is they are formed from junctions between regions electrically insulated from the epitaxial substrate on which the integrated circuit is formed. The invention applies in particular to subscriber line interface circuits.
    Type: Grant
    Filed: March 2, 1988
    Date of Patent: July 11, 1989
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Claude Renous