Abstract: A circuit and method for determining overcurrent in a FET detects an output voltage of the FET in both a positive and negative polarity. The related positive or negative currents through the FET can be measured to determine whether an overcurrent condition exists. By measuring positive and negative currents in the FET, the overcurrent detector can obtain twice as much information as when measuring a positive current alone, and can respond more readily to overcurrent conditions. The overcurrent detector avoids the constraints typically observed in cycle-by-cycle PWM control with single polarity Vds sensing, while permitting a relaxation in the timing requirements for current sensing. A spike suppression circuit also contributes to longer sensing intervals.

Abstract: A system and method is provided for detecting an over-current condition in a power field-effect transistor (FET). In one embodiment, an over-current detection circuit for detecting an over-current condition in a power FET comprises a current generator circuit operative to generate a reference current and a plurality of matched FETs operative to receive the reference current and provide a reference voltage, the matched FETs being matched to each other and to the power FET. The over-current detection circuit also comprises a comparator operative to measure a drain-to-source voltage of the power FET and to provide an output that indicates that the drain-to-source voltage of the power FET has exceeded the reference voltage.

Abstract: A circuit and method for determining overcurrent in a FET detects an output voltage of the FET in both a positive and negative polarity. The related positive or negative currents through the FET can be measured to determine whether an overcurrent condition exists. By measuring positive and negative currents in the FET, the overcurrent detector can obtain twice as much information as when measuring a positive current alone, and can respond more readily to overcurrent conditions. The overcurrent detector avoids the constraints typically observed in cycle-by-cycle PWM control with single polarity Vds sensing, while permitting a relaxation in the timing requirements for current sensing. A spike suppression circuit also contributes to longer sensing intervals.

Abstract: An amplifier system can include a biasing amplifier that provides a first amplified signal to a DC blocking element that is connected with a load based on a first control signal. A power amplifier provides a second amplified signal for driving the load based on a second control signal. A control system controls the biasing amplifier to charge the DC blocking element so as to mitigate a voltage drop across the load (e.g., to substantially eliminate audible artifacts) when the power amplifier is activated to provide the second amplified signal.

Abstract: Overcurrent and overload protection for the power output of a pulse-width-modulated digital audio system is disclosed. The overcurrent protection circuitry includes a latch that is set in responsive to output current from the power output stage that exceeds an overcurrent threshold; the output of the latch gates the pulse-width-modulated control signal to block power output for the remainder of the current pulse-width-modulated cycle; upon the end of the cycle, or the beginning of the next, the latch is cleared to enable power output in that next cycle. Overload protection is provided by circuitry including counters for counting the relative number of overcurrent cycles to normal, non-overcurrent cycles, and generating an overload signal to block power output in the event of too frequent overcurrent cycles.

Abstract: A system and method is provided for detecting an over-current condition in a power field-effect transistor (FET). In one embodiment, an over-current detection circuit for detecting an over-current condition in a power FET comprises a current generator circuit operative to generate a reference current and a plurality of matched FETs operative to receive the reference current and provide a reference voltage, the matched FETs being matched to each other and to the power FET. The over-current detection circuit also comprises a comparator operative to measure a drain-to-source voltage of the power FET and to provide an output that indicates that the drain-to-source voltage of the power FET has exceeded the reference voltage.

Abstract: A class-D amplifier circuit (30; 30?) providing improved open-loop error for base-band frequencies, such as the audio band, is disclosed. The amplifier circuit (30; 30?) includes a comparator (35) for generating a pulse-width-modulated output signal that is applied to an output power stage (37). An LC filter (32) is at the output of the power stage (37). The amplifier circuit (30; 30?) includes a loop filter having multiple feedback loop paths, with at least one feedback loop path coupled to the output of the power stage (37), and optionally, at least one feedback loop path coupled to the output of the LC filter (32). The transfer function (Hmae(s)) of the loop filter has a real part that has a much steeper slope (on the order of 80 dB/decade) at frequencies above the pulse-width-modulation switching frequency than the slope of its magnitude characteristic at frequencies below this switching frequency.

Abstract: An audio amplifier output stage layout technique achieves minimum cross coupling between audio amplifier channels. Regarding TDAA output stages, the typical TDAA includes two demodulation inductors per audio channel. The two pair of demodulation inductors associated with the TDAA are arranged to form an X-pattern to simultaneously minimize cross coupling between audio amplifier channels and reduce PCB layout size.

Abstract: An audio amplifier output stage layout technique achieves minimum cross coupling between audio amplifier channels. Regarding TDAA output stages, the typical TDAA includes two demodulation inductors per audio channel. The two pair of demodulation inductors associated with the TDAA are arranged to form an X-pattern to simultaneously minimize cross coupling between audio amplifier channels and reduce PCB layout size.