Abstract: An apparatus and method for determining power consumption in logic devices including mixed static and dynamic logic blocks is implemented. Input logical signals are tagged as having dynamical behavior or static behavior, and the power consumption of the logic block determined according to the behavior of the input signal. If an input signal has dynamic behavior, an output signal making a transition in response thereto will make two transitions per clock cycle, and the per cycle power consumption of the logic block is accordingly weighted. In another embodiment, a Boolean behavior signal is calculated for each block from clock phase tags and “one cycle per cycle” circuit level simulations. The per cycle power consumption of each logic block receives a weight in response to the Boolean behavior signal, according the behavior of the block characterized thereby.

Abstract: An integrated-circuit design is provided which is represented by a hierarchial data structure. In accordance with the method and system of the present invention, an integrated-circuit design which includes at least one parent circuit represented by a set of parent circuit level data and at least one child circuit represented by a set of child circuit level data. For an open circuit connection within the child circuit, a determination is made as to whether or not the open circuit connection is permissible. In response to a determination that the open circuit connection is permissible, another determination is made as to whether or not the number of I/O pins within the child circuit is greater than the number of open circuit connections within the child circuit.