Patents by Inventor Clayton Foster

Clayton Foster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230227602
    Abstract: A method to synthesize a low thermal expansion thermoset comprises mixing a thermosetting resin and a benzocyclobutene curative having a reactive secondary functionalization; heating the mixture to a first temperature to from a pre-polymer comprising benzocyclobutene end groups and a thermoset linking group; and heating the pre-polymer to a second temperature sufficient for ring-opening of benzocyclobutene to occur, thereby forming a thermoset polymer network crosslinked with dibenzocyclooctene moieties.
    Type: Application
    Filed: January 18, 2023
    Publication date: July 20, 2023
    Inventors: Jeffrey Clayton Foster, Erica Marie Redline, Koushik Ghosh, Chad Staiger
  • Publication number: 20230098669
    Abstract: The invention is directed to the selective dual wavelength olefin metathesis polymerization for additive manufacturing. Dual-wavelength stereolithographic printing uses ring-opening metathesis polymerization of the metathesis-active polymers. As an example, a resin formulation based on dicyclopentadiene was produced using a photolatent olefin metathesis catalyst, various photosensitizers and photobase generators to achieve efficient initiation by light at one wavelength (e.g., blue) and fast catalyst decomposition and polymerization deactivation by light at a second wavelength (e.g., ultraviolet). This process enables 2-dimensional stereolithographic printing, either using photomasks or with patterned, collimated light. Importantly, the same process was readily adapted for 3-dimensional continuous additive manufacturing, with printing rates of up to 36 mm h?1 for patterned light and up to 180 mm h?1 using un-patterned, high intensity light.
    Type: Application
    Filed: August 31, 2022
    Publication date: March 30, 2023
    Inventors: Samuel Carlos Leguizamon, Jeffrey Clayton Foster, Adam W. Cook, Leah Appelhans, Erica M. Redline, Brad Howard Jones
  • Patent number: 10996190
    Abstract: Apparatus and associated methods relate to a micro-electro-mechanical system (MEMS) based gas sensor including an electrolyte contacting one or more top electrode(s) arranged on the bottom surface of a top semiconductor substrate (TSS), and one or more bottom electrode(s) arranged on the top of a bottom semiconductor substrate (BSS), the TSS and BSS joined with an adhesive seal around the electrolyte, the sensor including one or more capillaries providing gaseous communication to the electrolyte from an external ambient environment. The electrodes may be electrically accessed by one or more vias to externally accessible bond pads. In some examples, an electrical connection may be made from an additional bond pad on top of the TSS to the electrolyte. Various embodiments may reduce the size of various gas sensors to advantageously allow their inclusion into portable electronic devices.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: May 4, 2021
    Assignee: HONEYWELL INTERNATIONAL INC.
    Inventors: Scott Edward Beck, Yong-Fa Wang, Robert Higashi, Philip Clayton Foster, Keith Francis Edwin Pratt, Cristian Vasile Diaconu
  • Publication number: 20190137440
    Abstract: Apparatus and associated methods relate to a micro-electro-mechanical system (MEMS) based gas sensor including an electrolyte contacting one or more top electrode(s) arranged on the bottom surface of a top semiconductor substrate (TSS), and one or more bottom electrode(s) arranged on the top of a bottom semiconductor substrate (BSS), the TSS and BSS joined with an adhesive seal around the electrolyte, the sensor including one or more capillaries providing gaseous communication to the electrolyte from an external ambient environment. The electrodes may be electrically accessed by one or more vias to externally accessible bond pads. In some examples, an electrical connection may be made from an additional bond pad on top of the TSS to the electrolyte. Various embodiments may reduce the size of various gas sensors to advantageously allow their inclusion into portable electronic devices.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 9, 2019
    Inventors: Scott Edward BECK, Yong-Fa WANG, Robert HIGASHI, Philip Clayton FOSTER, Keith Francis Edwin PRATT, Cristian Vasile DIACONU
  • Publication number: 20120303082
    Abstract: Discrimination between different types of possible cardiac pacing responses may depend on the timing of expected features that are sensed within a temporal framework. The temporal framework may include classification intervals, blanking periods and appropriately timed back up paces. The classification intervals and blanking periods of the temporal framework are intervals of time that have time parameters that include start time, end time, and length. The relationships and timing parameters of the elements of the temporal framework, e.g., blanking periods, classification intervals, delay periods, and backup pacing, should support detection of features used to discriminate between different types of pacing responses. As the system learns the morphology of the particular patient by analyzing the waveform of the pacing response signal, the temporal framework for pacing response determination may be adjusted to accommodate the individual patient.
    Type: Application
    Filed: November 29, 2011
    Publication date: November 29, 2012
    Inventors: Yanting Dong, Shibaji Shome, Aaron McCabe, Amy J. Brisben, Clayton Foster, David W. Yost, Kenneth N. Hayes
  • Patent number: 8271086
    Abstract: Approaches for adjusting the pacing energy delivered by a pacemaker are provided. Adjusting the pacing energy involves performing a plurality of capture threshold tests, each capture threshold test measuring a capture threshold of the heart. One or more measured captured thresholds are selected, including at least one capture threshold that is higher relative to other measured capture thresholds acquired by the plurality of capture threshold tests. The pacing energy is adjusted based on the one or more selected capture thresholds.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: September 18, 2012
    Assignee: Cardiac Pacemakers, Inc.
    Inventors: John Voegele, Clayton Foster, David W. Yost, Scott Meyer, Yanting Dong, Kevin J. Stalsberg, Derek D. Bohn, Eric K. Enrooth
  • Publication number: 20120165897
    Abstract: Approaches for rate initialization and overdrive pacing used during capture threshold testing are described. Cardiac cycles are detected and the cardiac events of a cardiac chamber that occur during the cardiac cycles are monitored. The number of intrinsic beats in the cardiac events is counted. Initialization for a capture threshold test involves maintaining a pre-test pacing rate for the capture threshold test if the number of intrinsic beats in the cardiac events is less than a threshold. The pacing rate is increased for the capture threshold test if the number of intrinsic beats in the cardiac events is greater than the threshold.
    Type: Application
    Filed: November 29, 2011
    Publication date: June 28, 2012
    Inventors: Eric K. Enrooth, Sunipa Saha, Clayton Foster, Yanting Dong
  • Publication number: 20070021793
    Abstract: Approaches for adjusting the pacing energy delivered by a pacemaker are provided. Adjusting the pacing energy involves performing a plurality of capture threshold tests, each capture threshold test measuring a capture threshold of the heart. One or more measured captured thresholds are selected, including at least one capture threshold that is higher relative to other measured capture thresholds acquired by the plurality of capture threshold tests. The pacing energy is adjusted based on the one or more selected capture thresholds.
    Type: Application
    Filed: July 19, 2005
    Publication date: January 25, 2007
    Inventors: John Voegele, Clayton Foster, David Yost, Scott Meyer, Yanting Dong, Kevin Stalsberg, Derek Bohn, Eric Enrooth
  • Publication number: 20060247695
    Abstract: Methods and systems for detecting noise in cardiac pacing response classification processes involve determining that a cardiac response classification is possibly erroneous if unexpected signal content is detected. The unexpected signal content may comprise signal peaks that have polarity opposite to the polarity of peaks used to determine the cardiac response to pacing. Fusion/noise management processes include pacing at a relatively high energy level until capture is detected after a fusion, indeterminate or possibly erroneous pacing response classification is made. The relatively high energy pacing pulses may be delivered until capture is detected or until a predetermined number of paces are delivered.
    Type: Application
    Filed: April 28, 2005
    Publication date: November 2, 2006
    Inventors: Kevin Stalsberg, Yanting Dong, Scott Meyer, John Voegele, Derek Bohn, Eric Enrooth, Clayton Foster, David Yost
  • Publication number: 20060212084
    Abstract: Cardiac devices and methods that select pacing rates for automatic threshold tests based on a patient's hemodynamic need. A sensor-indicated pacing rate corresponding to a patient's hemodynamic need is determined. A test pacing rate is selected from either the sensor-indicated rate or another rate. Capture threshold testing is performed using the selected pacing rate.
    Type: Application
    Filed: March 17, 2005
    Publication date: September 21, 2006
    Inventors: David Yost, Clayton Foster
  • Patent number: 6784506
    Abstract: A method for preventing the thermal decomposition of a high-K dielectric layer of a gate electrode during the formation of a metal silicide on the gate electrode by using nickel as the metal component of the silicide.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: August 31, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Qi Xiang, Paul R. Besser, Matthew S. Buynoski, John Clayton Foster, Paul L. King, Eric N. Paton
  • Patent number: 6764912
    Abstract: The formation of metal silicides in silicon nitride spacers on a gate electrode causes bridging between a gate electrode and the source and drain regions of a semiconductor device. The bridging is prevented by forming a thin layer of silicon oxide on the silicon nitride spacers prior to forming the metal silicide layers on the device.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: July 20, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: John Clayton Foster, Eric N. Paton, Matthew S. Buynoski, Qi Xiang, Paul R. Besser, Paul L. King
  • Patent number: 6605513
    Abstract: A self-aligned silicide process that can accommodate a low thermal budget and form silicide regions of small dimensions in a controlled reaction. In a first temperature treatment, nickel metal or nickel alloy is reacted with a silicon material to form at least one high resistance nickel silicide region. Unreacted nickel is removed. A dielectric layer is then deposited over a high resistance nickel silicide regions. In a second temperature treatment, the at least one high resistance nickel silicide region and dielectric layer are reacted at a prescribed temperature to form at least one low resistance silicide region and process the dielectric layer. Bridging between regions is avoided by the two-step process as silicide growth is controlled, and unreacted nickel between silicide regions is removed after the first temperature treatment. The processing of the high resistance nickel silicide regions and the dielectric layer are conveniently combined into a single temperature treatment.
    Type: Grant
    Filed: December 6, 2000
    Date of Patent: August 12, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Eric N. Paton, Ercan Adem, Jacques J. Bertrand, Paul R. Besser, Matthew S. Buynoski, John Clayton Foster, Paul L. King, George Jonathan Kluth, Minh Van Ngo, Christy Mei-Chu Woo
  • Publication number: 20030042515
    Abstract: A method for preventing the thermal decomposition of a high-K dielectric layer of a gate electrode during the formation of a metal silicide on the gate electrode by using nickel as the metal component of the silicide.
    Type: Application
    Filed: August 28, 2001
    Publication date: March 6, 2003
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Qi Xiang, Paul R. Besser, Matthew S. Buynoski, John Clayton Foster, Paul L. King, Eric N. Paton
  • Publication number: 20030034533
    Abstract: A damascene gate semiconductor structure that is formed utilizing a silicide stop layer. Initially, a gate opening is provided in an insulating layer on a substrate. A first dielectric layer is deposited in the gate opening over the substrate. A silicide stop layer is then deposited in the gate opening over the first silicon layer. A second silicon layer is then deposited in the gate opening over the silicide stop layer. A metal or alloy layer is then deposited over the insulating and the second silicon layer. The damascene semiconductor structure is then temperature treated to react the metal or alloy layer with the second silicon layer to form a silicide layer. Any unreated metal or alloy is then removed from the metal or alloy layer.
    Type: Application
    Filed: October 1, 2002
    Publication date: February 20, 2003
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Eric N. Paton, Paul R. Besser, Matthew S. Buynoski, Qi Xiang, Paul L. King, John Clayton Foster
  • Patent number: 6470210
    Abstract: Systems and methods are provided for analyzing occurrences of atrial arrhythmias. Occurrences of each of a number of classified atrial arrhythmia rhythms are detected. The classified atrial arrhythmias may, for example, include at least atrial fibrillation and atrial flutter. A duration of time associated with each of the detected atrial arrhythmia rhythms is measured. Trend data is produced with respect to a predetermined period of time using all or selected ones of the measured time durations. The detecting, measuring, and producing processes may also be performed for one or more unclassified atrial arrhythmias.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: October 22, 2002
    Assignee: Cardiac Pacemakers, Inc.
    Inventors: Victor Chen, Gary Seim, Carlos Ricci, LeAnne Eberle, Hal Propp, Clayton Foster
  • Publication number: 20020147408
    Abstract: Systems and methods are provided for analyzing occurrences of atrial arrhythmias. Occurrences of each of a number of classified atrial arrhythmia rhythms are detected. The classified atrial arrhythmias may, for example, include at least atrial fibrillation and atrial flutter. A duration of time associated with each of the detected atrial arrhythmia rhythms is measured. Trend data is produced with respect to a predetermined period of time using all or selected ones of the measured time durations. The detecting, measuring, and producing processes may also be performed for one or more unclassified atrial arrhythmias.
    Type: Application
    Filed: April 6, 2001
    Publication date: October 10, 2002
    Inventors: Victor Chen, Gary Seim, Carlos Ricci, LeAnne Eberle, Hal Propp, Clayton Foster
  • Patent number: 6458679
    Abstract: A damascene gate semiconductor structure that is formed utilizing a silicide stop layer. Initially, a gate opening is provided in an insulating layer on a substrate. A first dielectric layer is deposited in the gate opening over the substrate. A silicide stop layer is then deposited in the gate opening over the first silicon layer. A second silicon layer is then deposited in the gate opening over the silicide stop layer. A metal or alloy layer is then deposited over the insulating and the second silicon layer. The damascene semiconductor structure is then temperature treated to react the metal or alloy layer with the second silicon layer to form a silicide layer. Any unreated metal or alloy is then removed from the metal or alloy layer.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: October 1, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Eric N. Paton, Paul R. Besser, Matthew S. Buynoski, Qi Xiang, Paul L. King, John Clayton Foster
  • Publication number: 20020068408
    Abstract: A self-aligned silicide process that can accommodate a low thermal budget and form silicide regions of small dimensions in a controlled reaction. In a first temperature treatment, nickel metal or nickel alloy is reacted with a silicon material to form at least one high resistance nickel silicide region. Unreacted nickel is removed. A dielectric layer is then deposited over a high resistance nickel silicide regions. In a second temperature treatment, the at least one high resistance nickel silicide region and dielectric layer are reacted at a prescribed temperature to form at least one low resistance silicide region and process the dielectric layer. Bridging between regions is avoided by the two-step process as silicide growth is controlled, and unreacted nickel between silicide regions is removed after the first temperature treatment. The processing of the high resistance nickel silicide regions and the dielectric layer are conveniently combined into a single temperature treatment.
    Type: Application
    Filed: December 6, 2000
    Publication date: June 6, 2002
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Eric N. Paton, Ercan Adem, Jacques J. Bertrand, Paul R. Besser, Matthew S. Buynoski, John Clayton Foster, Paul L. King, George Jonathan Kluth, Minh Van Ngo, Christy Mei-Chu Woo