Abstract: A circuit is provide comprising a first input coupled to a transmit data input of a bus transceiver; and a first output coupled to a bus. The circuit is configured to be coupled in parallel with the bus transceiver. The circuit is further configured to, in response to a dominant to recessive transition on the transmit data input, lower an impedance of the bus.

Abstract: A Controller Area Network, CAN, device, (400) is described that includes: a CAN transmitter (430) connected to two CAN bus terminals (401, 402) of the CAN device (400); a receiver circuit (450) operably coupled to the two CAN bus terminals (401, 402) of the CAN device (400); and a controller (432) connected to the CAN transmitter (430). The controller (432) is configured to: determine whether the CAN device (400) is operating as a transmitter node or a receiver node; detect a transition of the CAN device (400) from a dominant state to a recessive state; and in response to detecting both a transition of the CAN device (400) from the dominant state to the recessive state, and the determination of whether the CAN device (400) is operating as a transmitter node or a receiver node, control an output impedance of the CAN transmitter (430) to be within an impedance value range whilst a differential driver voltage on a CAN bus (104, 304, 404) connected to the CAN device (400) decreases to a predefined voltage.

Abstract: A Controller Area Network, CAN, device, (400) is described that includes: a CAN transmitter (430) connected to two CAN bus terminals (401, 402) of the CAN device (400); a receiver circuit (450) operably coupled to the two CAN bus terminals (401, 402) of the CAN device (400); and a controller (432) connected to the CAN transmitter (430). The controller (432) is configured to: determine whether the CAN device (400) is operating as a transmitter node or a receiver node; detect a transition of the CAN device (400) from a dominant state to a recessive state; and in response to detecting both a transition of the CAN device (400) from the dominant state to the recessive state, and the determination of whether the CAN device (400) is operating as a transmitter node or a receiver node, control an output impedance of the CAN transmitter (430) to be within an impedance value range whilst a differential driver voltage on a CAN bus (104, 304, 404) connected to the CAN device (400) decreases to a predefined voltage.

Abstract: A circuit is provided for ringing suppression. The circuit comprises a termination resistor coupled to a bus via a switch; and a control circuit. The control circuit comprises an input coupled to a data input pin of a bus transceiver and an output coupled to control the termination resistor. The circuit is configured to selectively couple the resistor to the bus in response to a transition on the input bit stream.

Abstract: A circuit is provide comprising a first input coupled to a transmit data input of a bus transceiver; and a first output coupled to a bus. The circuit is configured to be coupled in parallel with the bus transceiver. The circuit is further configured to, in response to a dominant to recessive transition on the transmit data input, lower an impedance of the bus.

Abstract: A circuit is provided for ringing suppression. The circuit comprises a termination resistor coupled to a bus via a switch; and a control circuit. The control circuit comprises an input coupled to a data input pin of a bus transceiver and an output coupled to control the termination resistor. The circuit is configured to selectively couple the resistor to the bus in response to a transition on the input bit stream.

Abstract: The present invention relates to a circuit arrangement, which is used for controlling a high side CMOS transistor (M1) in a high voltage deep sub micron process. To provide a circuit arrangement for switching a high side CMOS transistor (M1) in a circuit having a very thin gate oxide, produced by a deep sub micron process, a circuit arrangement is proposed for controlling a high side CMOS transistor (M1), wherein the high side CMOS transistor (M1) is coupled between a high side voltage potential (Vbat) and a control output (OUT) for switching an external device, the high side CMOS transistor (M1) is controlled at its gate by a reference potential (Vbat-Vref), which is provided by a high side voltage reference (11) having a capacitor (C1), which is charged for switching on and discharged for switching off the high side CMOS transistor (M1).

Abstract: The present invention relates to a circuit arrangement, which is used for controlling a high side CMOS transistor (M1) in a high voltage deep sub micron process. To provide a circuit arrangement for switching a high side CMOS transistor (M1) in a circuit having a very thin gate oxide, which is in particular produced by a deep sub micron process a circuit arrangement is proposed for controlling a high side CMOS transistor (M1) in a high voltage deep sub micron process, wherein the high side CMOS transistor (M1) is coupled between a high side voltage potential (Vbat) and a control output (OUT) for switching an external device, the high side CMOS transistor (M1) is controlled at its gate by a reference potential (Vbat-Vref), which is provided by a high side voltage reference (11) having a capacitor (C1), which is charged for switching on and discharged for switching off the high side CMOS transistor (M1).

Abstract: Circuit arrangement, L[ocal]I[nterconnected]N[etwork] comprising such circuit arrangement as well as method for processing input signals of the LIN In order to further develop a circuit arrangement (100)—for processing at least one input signal (12) from at least one data bus (10) of at least one L[ocal]I[nterconnected]N[etwork] and—for providing the data bus (10) with at least one output signal (18), as well as a corresponding operating method in such way that E[lectro]M[agnetic]E[mission] performance and/or E[lectro]M[agnetic]I[mmunity] performance of the L[ocal]I[nterconnected]N[etwork] (300) is improved, it is proposed to provide—at least one analog-digital converting means (ADC) for converting the analog input signal (12) into at least one digital signal (14) to be processed, and—at least one digital-analog converting means (DAC) for converting the processed digital signal (16) into the analog output signal (18).

Abstract: A bondwire decoupling filter 300 for filtering RF noise from a transceiver bus 330 of a transceiver 303 connected a device 302 to be protected from RF noise. The filter includes an external capacitor 315 adapted to receive an output from a device 302 to be protected from the RF, noise; a first pair of bondwires 305, 307 each having respective first and second ends, and the first pair of bondwires is connected to the external capacitor 315 at respective first ends. A first bondwire 307 of the first pair of bondwires 305, 307 is connected to an output of a voltage regulator 302, and a second bondwire 305 of said first pair of bondwires being connected to the transceiver bus 330 at respective second ends. A second pair of bondwires 310,312 each having respective first and second ends, are connected to a ground at respective first ends, and connected respectively to a voltage regulator 302 and a transceiver bus 330 at respective second ends.