Abstract: A structure is provided and includes (i) a substrate having a surface, the surface comprising a ternary or quaternary oxide having a first lattice parameter, the first lattice parameter being a lattice parameter of the ternary or quaternary oxide as it is present at the surface; and (ii) a layer of a perovskite oxide on the ternary or quaternary oxide, the perovskite oxide having a second lattice parameter, the second lattice parameter being a native lattice parameter of the perovskite oxide, wherein the first lattice parameter is larger than the second lattice parameter. A method for forming a perovskite oxide with an a-axis orientation is also provided.

Abstract: The disclosed technology is directed to a method of forming a qubit device.

Abstract: A device and method for manufacturing a Si-based high-mobility CMOS device is provided.

Abstract: An electrically-operated semiconductor laser device and method for forming the laser device are provided. The laser device includes a fin structure to which a waveguide is optically coupled. The waveguide is optically coupled to passive waveguides at either end thereof. The fin structure includes an array of fin elements, each fin element comprising Group III-V materials.

Abstract: A structure is provided and includes (i) a substrate having a surface, the surface comprising a ternary or quaternary oxide having a first lattice parameter, the first lattice parameter being a lattice parameter of the ternary or quaternary oxide as it is present at the surface; and (ii) a layer of a perovskite oxide on the ternary or quaternary oxide, the perovskite oxide having a second lattice parameter, the second lattice parameter being a native lattice parameter of the perovskite oxide, wherein the first lattice parameter is larger than the second lattice parameter. A method for forming a perovskite oxide with an a-axis orientation is also provided.

Abstract: A method for forming a Transition Metal Dichalcogenide (TMD)—Group III-V semiconductor heterostructure comprises forming an insulating layer on an upper surface of a substrate, wherein the upper surface of the substrate is formed by a (111)-surface of a group IV semiconductor, forming a first aperture in the insulating layer, the aperture exposing a portion of the upper surface of the substrate, forming in a first epitaxial growth process, a semiconductor structure formed by a group III-V semiconductor comprising a pillar extending through the first aperture and a micro disc extending horizontally along a first portion of the upper surface of the insulating layer, and forming in a second epitaxial growth process, a TMD layer on an upper surface of the micro disc.

Abstract: A method for formation of a transition metal dichalcogenide (TMDC) material layer on a substrate arranged in a process chamber of a molecular beam epitaxy tool is provided. The method includes evaporating metal from a solid metal source, forming a chalcogen-including gas-plasma, and introducing the evaporated metal and the chalcogen-including gas-plasma into the process chamber thereby forming a TMDC material layer on the substrate.

Abstract: The disclosed technology is directed to a method of forming a qubit device.

Abstract: A device and method for manufacturing a Si-based high-mobility CMOS device is provided.

Abstract: A device and method for manufacturing a Si-based high-mobility CMOS device is provided.

Abstract: A method for forming a semiconductor device is disclosed. The method includes providing a semiconductor substrate. The method also includes epitaxially growing on the semiconductor substrate a first part of a III-V semiconductor nanostructure. The method further includes covering the first part of the III-V semiconductor nanostructure with a layer of a first material. Additionally, the method includes removing a top portion of the layer of the first material. Still further, the method includes epitaxially growing on the first part of the III-V semiconductor nanostructure a second part of the III-V semiconductor nanostructure. The method additionally includes covering the second part of the III-V semiconductor nanostructure with a layer of a second material. The second material is different from the first material. Even further, the method includes removing a top portion of the layer of the second material.

Abstract: An electrically-operated semiconductor laser device and method for forming the laser device are provided. The laser device includes a fin structure to which a waveguide is optically coupled. The waveguide is optically coupled to passive waveguides at either end thereof. The fin structure includes an array of fin elements, each fin element comprising Group III-V materials.

Abstract: A method for formation of a transition metal dichalcogenide (TMDC) material layer on a substrate arranged in a process chamber of a molecular beam epitaxy tool is provided. The method includes evaporating metal from a solid metal source, forming a chalcogen-including gas-plasma, and introducing the evaporated metal and the chalcogen-including gas-plasma into the process chamber thereby forming a TMDC material layer on the substrate.

Abstract: A device and method for manufacturing a Si-based high-mobility CMOS device is provided.

Abstract: A device and method for manufacturing a Si-based high-mobility CMOS device is provided.

Abstract: A device and method for manufacturing a Si-based high-mobility CMOS device is provided.

Abstract: A method for forming a semiconductor device is disclosed. The method includes providing a semiconductor substrate. The method also includes epitaxially growing on the semiconductor substrate a first part of a III-V semiconductor nanostructure. The method further includes covering the first part of the III-V semiconductor nanostructure with a layer of a first material. Additionally, the method includes removing a top portion of the layer of the first material. Still further, the method include epitaxially growing on the first part of the III-V semiconductor nanostructure a second part of the III-V semiconductor nanostructure. The method additionally includes covering the second part of the III-V semiconductor nanostructure with a layer of a second material. The second material is different from the first material. Even further, the method includes removing a top portion of the layer of the second material.

Abstract: A method of producing a pre-patterned structure comprising at least one cavity for growing a vertical nanostructure is disclosed. The method includes providing at least one protruding structure that extends upwardly from a main surface of a substrate. The at least one protruding structure has a main portion of a first height and an upper portion on the main portion. The method also includes embedding the at least one protruding structure in a dielectric material. Further, the method includes removing at least an excess portion of the dielectric material, thereby exposing a top surface of the upper portion and forming a flattened surface of the top surface of the upper portion and the dielectric material. In addition, the method includes forming at least one cavity of a first depth by removing the upper portion, thereby exposing a top surface of the main portion of the at least one protruding structure.

Abstract: The disclosed technology generally relates to semiconductor devices and more particularly to a gate-all-around semiconductor device, and methods of fabricating the same. In one aspect, the method comprises providing on a semiconductor substrate between STI regions at least one suspended nanostructure anchored by a source region and a drain region. The suspended nanostructure is formed of a crystalline semiconductor material that is different from a crystalline semiconductor material of the semiconductor substrate. A gate stack surrounds the at least one suspended nanostructure.

Abstract: An example semiconductor structure comprises a first surface and at least one nanowire, the at least one nanowire being perpendicular to the first surface, wherein the first surface is defect-poor and is made of a doped III-V semiconductor material, wherein the at least one nanowire is defect-poor and made of an undoped III-V semiconductor material having a lattice mismatch with the material of the first surface of from about 0% to 1%.