Patents by Inventor Cliff DROWLEY

Cliff DROWLEY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Double-side process silicon MOS and passive devices for RF front-end modules
    Patent number: 9711502
    Abstract: An integrated circuit includes a first semiconductor substrate having a first surface and a second surface opposite to the first surface, at least one first trench extending into the first semiconductor substrate from the first surface and having a first depth, at least one second trench extending into the first semiconductor substrate from the first surface and having a second depth greater than the first depth, a thinned semiconductor region with a first recessed region extending in the first semiconductor substrate from the second surface and having a first thickness, a second recessed region in the first semiconductor substrate extending from the second surface to the first surface, and a bulk dielectric layer covering the second surface of the first semiconductor substrate.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: July 18, 2017
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Herb He Huang, Cliff Drowley
  • DOUBLE-SIDE PROCESS SILICON MOS AND PASSIVE DEVICES FOR RF FRONT-END MODULES
    Publication number: 20170053907
    Abstract: An integrated circuit includes a first semiconductor substrate having a first surface and a second surface opposite to the first surface, at least one first trench extending into the first semiconductor substrate from the first surface and having a first depth, at least one second trench extending into the first semiconductor substrate from the first surface and having a second depth greater than the first depth, a thinned semiconductor region with a first recessed region extending in the first semiconductor substrate from the second surface and having a first thickness, a second recessed region in the first semiconductor substrate extending from the second surface to the first surface, and a bulk dielectric layer covering the second surface of the first semiconductor substrate.
    Type: Application
    Filed: November 7, 2016
    Publication date: February 23, 2017
    Inventors: HERB HE HUANG, CLIFF DROWLEY
  • DOUBLE-SIDE PROCESS SILICON MOS AND PASSIVE DEVICES FOR RF FRONT-END MODULES
    Publication number: 20150368095
    Abstract: A method for forming integrated circuit includes providing a first semiconductor substrate having a front surface and a back surface that is opposite to the front surface. One or more first trenches are in the first semiconductor substrate from the front surface side, the first trenches being characterized by a first depth. One or more second trenches are formed in the first semiconductor substrate from the front surface side, the second trenches being characterized by a second depth which greater than the first depth. A horizontal isolation layer is formed parallel to the front surface and at a third depth from the front surface. The method also includes forming a first recessed region extending in the first semiconductor substrate from the back surface side to the horizontal isolation layer that results in a thinned semiconductor region having a thickness substantially equal to the third depth.
    Type: Application
    Filed: August 28, 2015
    Publication date: December 24, 2015
    Inventors: HERB HE HUANG, CLIFF DROWLEY
  • Double-side process silicon MOS and passive devices for RF front-end modules
    Patent number: 9147598
    Abstract: A method for forming integrated circuit includes providing a first semiconductor substrate having a front surface and a back surface that is opposite to the front surface. One or more first trenches are in the first semiconductor substrate from the front surface side, the first trenches being characterized by a first depth. One or more second trenches are formed in the first semiconductor substrate from the front surface side, the second trenches being characterized by a second depth which greater than the first depth. A horizontal isolation layer is formed parallel to the front surface and at a third depth from the front surface. The method also includes forming a first recessed region extending in the first semiconductor substrate from the back surface side to the horizontal isolation layer that results in a thinned semiconductor region having a thickness substantially equal to the third depth.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: September 29, 2015
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Herb He Huang, Cliff Drowley
  • DOUBLE-SIDE PROCESS SILICON MOS AND PASSIVE DEVICES FOR RF FRONT-END MODULES
    Publication number: 20140367777
    Abstract: A method for forming integrated circuit includes providing a first semiconductor substrate having a front surface and a back surface that is opposite to the front surface. One or more first trenches are in the first semiconductor substrate from the front surface side, the first trenches being characterized by a first depth. One or more second trenches are formed in the first semiconductor substrate from the front surface side, the second trenches being characterized by a second depth which greater than the first depth. A horizontal isolation layer is formed parallel to the front surface and at a third depth from the front surface. The method also includes forming a first recessed region extending in the first semiconductor substrate from the back surface side to the horizontal isolation layer that results in a thinned semiconductor region having a thickness substantially equal to the third depth.
    Type: Application
    Filed: November 19, 2013
    Publication date: December 18, 2014
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Herb He HUANG, Cliff DROWLEY