Patents by Inventor Clifford A. Whitmore
Clifford A. Whitmore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7616200Abstract: An apparatus and method of displaying a first image on a display device with a plurality of pixels assigns one of a plurality of sample patterns to each pixel on the display device. Each pixel is assigned the one of a plurality of patterns based upon its unique location on the display device. Each sample pattern has at least one sample location. It then is determined if the first image intersects any of the sample locations on each pixel. Pixels determined to have at least one sample location that intersect the first image thus are illuminated.Type: GrantFiled: June 10, 1999Date of Patent: November 10, 2009Assignee: 3Dlabs Inc. Ltd.Inventors: Steven J. Heinrich, Mark A. Mosley, Clifford A. Whitmore, James L. Deming, Stewart G. Carlton, Matt E. Buckelew, Dale L. Kirkland, Timothy S. Johnson
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Patent number: 6734860Abstract: An apparatus for processing a graphical data stream for display on a display device includes a processor, a first conversion module and a second conversion module. The processor determines the characteristics of the graphical data stream. The first conversion module and the second conversion module convert the graphical data stream in a first format to a second format. The graphical data stream is directed to the first conversion module by a first data path and the graphical data stream is directed to the second conversion module by a second data path. A switching system is used to alternately connect the first conversion module through the first data path and the second conversion module through the second data path.Type: GrantFiled: August 4, 2000Date of Patent: May 11, 2004Assignee: 3Dlabs, Inc., Ltd.Inventors: Michael Potter, Clifford A. Whitmore
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Patent number: 6667744Abstract: A device for storing pixel information for displaying a graphics image on a display includes a frame buffer and a processor. The information includes an intensity value and a value associated with each of a plurality of additional planes for each pixel. The frame buffer memory has a series of consecutive addresses for storing information to be output to the display. The frame buffer may be subdivided into a plurality of blocks, where each block corresponds to a region of the display having a plurality of contiguous pixels. The processor places the pixel information within the frame buffer memory so that in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.Type: GrantFiled: August 21, 2001Date of Patent: December 23, 2003Assignee: 3Dlabs, Inc., LtdInventors: Matt E. Buckelew, Stewart G. Carlton, James L. Deming, Michael S. Farmer, Steven J. Heinrich, Mark A. Mosley, Clifford A. Whitmore
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Patent number: 6642928Abstract: An apparatus for displaying a polygon on a horizontal scan display device having a plurality of pixels includes first and second rasterizers that each process respective first and second sets of pixels. Each set of pixels includes vertical stripes that are transverse to the horizontal scan of the display. To that end, the first rasterizer has an input for receiving polygon data relating to the polygon. The first rasterizer determines a first set of pixels that are to be lit for display of the polygon, and also determines display characteristics of the first set of pixels. Similar manner, the second rasterizer also includes an input for receiving polygon data relating to the polygon. The second rasterizer similarly determines a second set of pixels that are to be lit for display of the polygon, and also determines display characteristics of the second set of pixels.Type: GrantFiled: May 1, 2002Date of Patent: November 4, 2003Assignee: 3DLabs, Inc., Ltd.Inventors: James L. Deming, Matt E. Buckelew, Clifford A. Whitmore, Steven J. Heinrich, Dale L. Kirkland, Timothy S. Johnson
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Patent number: 6628288Abstract: A back end unit for use with a graphics processor includes an input for receiving graphics data streams from the graphics processor, an output for transmitting graphics data streams, and a plurality of paths, coupled with the input and output, that direct graphics data streams between the input and the output. The plurality of paths direct data between the various modules that are a part of the back end unit. To that end, among other things, the back end unit also includes a gamma correction module that applies gamma correction operations to graphics data streams, a cursor module that adds cursor data to graphics data streams, and a digital to analog converter that converts the graphics data streams from a digital format to an analog format. The plurality of paths thus permit graphics data streams to pass through no more than two of the gamma correction module, the cursor module, and the digital to analog converter.Type: GrantFiled: August 4, 2000Date of Patent: September 30, 2003Assignee: 3Dlabs, Inc., Ltd.Inventors: Michael Potter, Clifford A. Whitmore, Jeff S. Ford
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Patent number: 6535216Abstract: An apparatus for displaying a polygon on a horizontal scan display device having a plurality of pixels includes first and second rasterizers that each process respective first and second sets of pixels. Each set of pixels includes vertical stripes that are transverse to the horizontal scan of the display. To that end, the first rasterizer has an input for receiving polygon data relating to the polygon. The first rasterizer determines a first set of pixels that are to be lit for display of the polygon, and also determines display characteristics of the first set of pixels. In a similar manner, the second rasterizer also includes an input for receiving polygon data relating to the polygon. The second rasterizer similarly determines a second set of pixels that are to be lit for display of the polygon, and also determines display characteristics of the second set of pixels.Type: GrantFiled: May 1, 2002Date of Patent: March 18, 2003Assignee: 3DLabs, Inc., Ltd.Inventors: James L. Deming, Matt E. Buckelew, Clifford A. Whitmore, Steven J. Heinrich, Dale L. Kirkland, Timothy S. Johnson
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Patent number: 6476816Abstract: An apparatus for displaying a polygon on a horizontal scan display device having a plurality of pixels includes first and second rasterizers that each process respective first and second sets of pixels. Each set of pixels includes vertical stripes that are transverse to the horizontal scan of the display. To that end, the first rasterizer has an input for receiving polygon data relating to the polygon. The first rasterizer determines a first set of pixels that are to be lit for display of the polygon, and also determines display characteristics of the first set of pixels. In a similar manner, the second rasterizer also includes an input for receiving polygon data relating to the polygon. The second rasterizer similarly determines a second set of pixels that are to be lit for display of the polygon, and also determines display characteristics of the second set of pixels.Type: GrantFiled: July 15, 1999Date of Patent: November 5, 2002Assignee: 3Dlabs Inc. Ltd.Inventors: James L. Deming, Matt E. Buckelew, Clifford A. Whitmore, Steven J. Heinrich, Dale L. Kirkland, Timothy S. Johnson
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Publication number: 20020050959Abstract: A device for storing pixel information for displaying a graphics image on a display includes a frame buffer and a processor. The information includes an intensity value and a value associated with each of a plurality of additional planes for each pixel. The frame buffer memory has a series of consecutive addresses for storing information to be output to the display. The frame buffer may be subdivided into a plurality of blocks, where each block corresponds to a region of the display having a plurality of contiguous pixels. The processor places the pixel information within the frame buffer memory so that in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.Type: ApplicationFiled: August 21, 2001Publication date: May 2, 2002Inventors: Matt E. Buckelew, Stewart G. Carlton, James L. Deming, Michael S. Farmer, Steven J. Heinrich, Mark A. Mosley, Clifford A. Whitmore
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Patent number: 6278645Abstract: A device for storing pixel information for displaying a graphics image on a display includes a frame buffer and a processor. The information includes an intensity value and a value associated with each of a plurality of additional planes for each pixel. The frame buffer memory has a series of consecutive addresses for storing information to be output to the display. The frame buffer may be subdivided into a plurality of blocks, where each block corresponds to a region of the display having a plurality of contiguous pixels. The processor places the pixel information within the frame buffer memory so that in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.Type: GrantFiled: August 5, 1998Date of Patent: August 21, 2001Assignee: 3Dlabs Inc., Ltd.Inventors: Matt E. Buckelew, Stewart G. Carlton, James L. Deming, Michael S. Farmer, Steven J. Heinrich, Mark A. Mosley, Clifford A. Whitmore
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Patent number: 6157393Abstract: An apparatus for and method of directing graphical data toward a display device from a plurality of graphics processors couples the graphics processors in a manner that reduces the size of the interface on each graphics processor. In particular, each graphics processor produces graphical data for an associated set of pixels on the display device, where each pixel is represented by a first amount of graphical data. The graphics processors are arranged so that one of the graphics processors is a destination processor. The total number of graphics processors that are not designated as the destination processor thus constitute a remaining number. Each graphics processor produces a second amount of graphical data during each clock cycle of a common clock. The first amount of graphical data, however, is comprised of at least substantially two times the second amount of graphical data.Type: GrantFiled: July 15, 1999Date of Patent: December 5, 2000Assignee: Intergraph CorporationInventors: Michael Potter, Clifford A. Whitmore
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Patent number: 5864512Abstract: This invention relates to providing high-speed video graphics through use of single ported memory chips on the video card.Type: GrantFiled: April 11, 1997Date of Patent: January 26, 1999Assignee: Intergraph CorporationInventors: Matt E. Buckelew, Stewart G. Carlton, James L. Deming, Michael S. Farmer, Steven J. Heinrich, Mark A. Mosley, Clifford A. Whitmore