Patents by Inventor Clifford Gibson
Clifford Gibson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250068693Abstract: Methods and systems for performing a convolution transpose operation between an input tensor having a plurality of input elements and a filter comprising a plurality of filter weights. The method includes: dividing the filter into a plurality of sub-filters; performing, using hardware logic, a convolution operation between the input tensor and each of the plurality of sub-filters to generate a plurality of sub-output tensors, each sub-output tensor comprising a plurality of output elements; and interleaving, using hardware logic, the output elements of the plurality of sub-output tensors to form a final output tensor for the convolution transpose.Type: ApplicationFiled: November 15, 2024Publication date: February 27, 2025Inventors: Cagatay Dikici, Clifford Gibson, James Imber
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Publication number: 20250042453Abstract: Examples relate to digital context aware (DCA) data collection. In some examples, a DCA start location component is positioned at a first location along a travel route, and a DCA end location component is positioned at a second location along the travel route. In response to using a wireless interface to detect the DCA start location component, data collection of measurements by a sensor are initiated. In response to using the wireless interface to detect the DCA end location component, the data collection by the sensor is halted.Type: ApplicationFiled: October 17, 2024Publication date: February 6, 2025Applicant: Ent. Services Development Corporation LPInventors: Jonathan GIBSON, Clifford Allan Wilke, Paul David THOMAS, Ben REES
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Patent number: 12217161Abstract: A method of configuring a hardware implementation of a Convolutional Neural Network (CNN), the method comprising: determining, for each of a plurality of layers of the CNN, a first number format for representing weight values in the layer based upon a distribution of weight values for the layer, the first number format comprising a first integer of a first predetermined bit-length and a first exponent value that is fixed for the layer; determining, for each of a plurality of layers of the CNN, a second number format for representing data values in the layer based upon a distribution of expected data values for the layer, the second number format comprising a second integer of a second predetermined bit-length and a second exponent value that is fixed for the layer; and storing the determined number formats for use in configuring the hardware implementation of a CNN.Type: GrantFiled: October 11, 2021Date of Patent: February 4, 2025Assignee: Imagination Technologies LimitedInventors: Clifford Gibson, James Imber
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Publication number: 20250036412Abstract: Described herein is a graphics processor comprising a memory interface and a graphics processing cluster coupled with the memory interface. The graphics processing cluster includes a plurality of processing resources. A processing resource of the plurality of processing resources includes a source crossbar communicatively coupled with a register file, the source crossbar to reorder data elements of a source operand and a format conversion pipeline to convert a plurality of input data elements specified by the source operand from a first format of a plurality of datatype formats to a second format of the plurality of datatype formats, the plurality of datatype formats including integer and floating-point formats.Type: ApplicationFiled: July 25, 2023Publication date: January 30, 2025Applicant: Intel CorporationInventors: Supratim Pal, Jiasheng Chen, Christopher Spencer, Jorge E. Parra Osorio, Kevin Hurd, Guei-Yuan Lueh, Pradeep K. Golconda, Fangwen Fu, Wei Xiong, Hongzheng Li, James Valerio, Mukundan Swaminathan, Nicholas Murphy, Shuai Mu, Clifford Gibson, Buqi Cheng
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Publication number: 20250036361Abstract: Described herein is a graphics processor comprising a memory interface and a graphics processing cluster coupled with the memory interface. The graphics processing cluster includes a multi-lane parallel floating-point unit and a multi-lane parallel integer unit. The multi-lane parallel integer unit includes an integer pipeline including a plurality of parallel integer logic units configured to perform integer compute operations on a plurality of input data elements and a format conversion pipeline including a plurality of parallel format conversion units configured to convert a plurality of input data elements from a first one of a plurality of datatype formats to a second one of the plurality of datatype formats, the plurality of datatype formats including integer and floating-point formats.Type: ApplicationFiled: July 25, 2023Publication date: January 30, 2025Applicant: Intel CorporationInventors: Supratim Pal, Jiasheng Chen, Kevin Hurd, Jorge E. Parra Osorio, Christopher Spencer, Guei-Yuan Lueh, Pradeep K. Golconda, Fangwen Fu, Wei Xiong, Hongzheng Li, James Valerio, Mukundan Swaminathan, Nicholas Murphy, Shuai Mu, Clifford Gibson, Buqi Cheng
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Publication number: 20250039699Abstract: In examples provided herein, upon receiving notification of a computational task requested by a package to provide an experience to a user, a remote node management engine identifies computing nodes for performing the computational task and determining available processing resources for each computing node, where a computing node resides at networked wearable devices associated with the user. The remote node management engine further selects one of the computing nodes as a primary controller to distribute portions of the computational task to one or more of the other computing nodes and receive results from performance of the portions of the computational task by the other computing nodes, and provides to the selected computing node information about available processing resources at each computing node.Type: ApplicationFiled: October 10, 2024Publication date: January 30, 2025Inventors: Jonathan GIBSON, Joseph MILLER, Clifford A. Wilke, Scott A. GAYDOS
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Publication number: 20250037347Abstract: Described herein is a graphics processor comprising an instruction cache and a plurality of processing elements coupled with the instruction cache. The plurality of processing elements include functional units configured to provide an integer pipeline to execute instructions to perform operations on integer data elements. The integer pipeline including a first multiplier and a second multiplier, the first multiplier and the second multiplier configured to execute operations for a single instruction.Type: ApplicationFiled: July 25, 2023Publication date: January 30, 2025Applicant: Intel CorporationInventors: Jiasheng Chen, Supratim Pal, Kevin Hurd, Jorge E. Parra Osorio, Christopher Spencer, Takashi Nakagawa, Guei-Yuan Lueh, Pradeep K. Golconda, James Valerio, Mukundan Swaminathan, Nicholas Murphy, Clifford Gibson, Li-An Tang, Fangwen Fu, Kaiyu Chen, Buqi Cheng
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Patent number: 12174910Abstract: Methods and systems for performing a convolution transpose operation between an input tensor having a plurality of input elements and a filter comprising a plurality of filter weights. The method includes: dividing the filter into a plurality of sub-filters; performing, using hardware logic, a convolution operation between the input tensor and each of the plurality of sub-filters to generate a plurality of sub-output tensors, each sub-output tensor comprising a plurality of output elements; and interleaving, using hardware logic, the output elements of the plurality of sub-output tensors to form a final output tensor for the convolution transpose.Type: GrantFiled: January 29, 2024Date of Patent: December 24, 2024Assignee: Imagination Technologies LimitedInventors: Cagatay Dikici, Clifford Gibson, James Imber
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Publication number: 20240412056Abstract: Hardware implementations of Deep Neural Networks (DNNs) and related methods with a variable output data format. Specifically, in the hardware implementations and methods described herein the hardware implementation is configured to perform one or more hardware passes to implement a DNN wherein during each hardware pass the hardware implementation receives input data for a particular layer, processes that input data in accordance with the particular layer (and optionally one or more subsequent layers), and outputs the processed data in a desired format based on the layer, or layers, that are processed in the particular hardware pass. In particular, when a hardware implementation receives input data to be processed, the hardware implementation also receives information indicating the desired format for the output data of the hardware pass and the hardware implementation is configured to, prior to outputting the processed data convert the output data to the desired format.Type: ApplicationFiled: August 23, 2024Publication date: December 12, 2024Inventors: Chris Martin, David Hough, Paul Brasnett, Cagatay Dikici, James Imber, Clifford Gibson
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Patent number: 12165045Abstract: Hardware implementations of DNNs and related methods with a variable output data format. Specifically, in the hardware implementations and methods described herein the hardware implementation is configured to perform one or more hardware passes to implement a DNN wherein during each hardware pass the hardware implementation receives input data for a particular layer, processes that input data in accordance with the particular layer (and optionally one or more subsequent layers), and outputs the processed data in a desired format based on the layer, or layers, that are processed in the particular hardware pass. In particular, when a hardware implementation receives input data to be processed, the hardware implementation also receives information indicating the desired format for the output data of the hardware pass and the hardware implementation is configured to, prior to outputting the processed data convert the output data to the desired format.Type: GrantFiled: September 20, 2018Date of Patent: December 10, 2024Assignee: Imagination Technologies LimitedInventors: Chris Martin, David Hough, Paul Brasnett, Cagatay Dikici, James Imber, Clifford Gibson
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Publication number: 20240249131Abstract: A method in a hardware implementation of a Convolutional Neural Network (CNN), includes receiving a first subset of data having at least a portion of weight data and at least a portion of input data for a CNN layer and performing, using at least one convolution engine, a convolution of the first subset of data to generate a first partial result; receiving a second subset of data comprising at least a portion of weight data and at least a portion of input data for the CNN layer and performing, using the at least one convolution engine, a convolution of the second subset of data to generate a second partial result; and combining the first partial result and the second partial result to generate at least a portion of convolved data for a layer of the CNN.Type: ApplicationFiled: April 1, 2024Publication date: July 25, 2024Inventors: Clifford Gibson, James Imber
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Publication number: 20240169017Abstract: Methods and systems for performing a convolution transpose operation between an input tensor having a plurality of input elements and a filter comprising a plurality of filter weights. The method includes: dividing the filter into a plurality of sub-filters; performing, using hardware logic, a convolution operation between the input tensor and each of the plurality of sub-filters to generate a plurality of sub-output tensors, each sub-output tensor comprising a plurality of output elements; and interleaving, using hardware logic, the output elements of the plurality of sub-output tensors to form a final output tensor for the convolution transpose.Type: ApplicationFiled: January 29, 2024Publication date: May 23, 2024Inventors: Cagatay Dikici, Clifford Gibson, James Imber
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Patent number: 11948070Abstract: A method in a hardware implementation of a Convolutional Neural Network (CNN), includes receiving a first subset of data having at least a portion of weight data and at least a portion of input data for a CNN layer and performing, using at least one convolution engine, a convolution of the first subset of data to generate a first partial result; receiving a second subset of data comprising at least a portion of weight data and at least a portion of input data for the CNN layer and performing, using the at least one convolution engine, a convolution of the second subset of data to generate a second partial result; and combining the first partial result and the second partial result to generate at least a portion of convolved data for a layer of the CNN.Type: GrantFiled: April 10, 2023Date of Patent: April 2, 2024Assignee: Imagination Technologies LimitedInventors: Clifford Gibson, James Imber
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Patent number: 11886536Abstract: Methods and systems for performing a convolution transpose operation between an input tensor having a plurality of input elements and a filter comprising a plurality of filter weights. The method includes: dividing the filter into a plurality of sub-filters; performing, using hardware logic, a convolution operation between the input tensor and each of the plurality of sub-filters to generate a plurality of sub-output tensors, each sub-output tensor comprising a plurality of output elements; and interleaving, using hardware logic, the output elements of the plurality of sub-output tensors to form a final output tensor for the convolution transpose.Type: GrantFiled: January 12, 2023Date of Patent: January 30, 2024Assignee: Imagination Technologies LimitedInventors: Cagatay Dikici, Clifford Gibson, James Imber
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Patent number: 11868426Abstract: Hardware implementations of, and methods for processing, a convolution layer of a DNN that comprise a plurality of convolution engines wherein the input data and weights are provided to the convolution engines in an order that allows input data and weights read from memory to be used in at least two filter-window calculations performed either by the same convolution engine in successive cycles or by different convolution engines in the same cycle. For example, in some hardware implementations of a convolution layer the convolution engines are configured to process the same weights but different input data each cycle, but the input data for each convolution engine remains the same for at least two cycles so that the convolution engines use the same input data in at least two consecutive cycles.Type: GrantFiled: October 26, 2021Date of Patent: January 9, 2024Assignee: Imagination Technologies LimitedInventors: Chris Martin, David Hough, Clifford Gibson, Daniel Barnard
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Publication number: 20230306248Abstract: A method in a hardware implementation of a Convolutional Neural Network (CNN), includes receiving a first subset of data having at least a portion of weight data and at least a portion of input data for a CNN layer and performing, using at least one convolution engine, a convolution of the first subset of data to generate a first partial result; receiving a second subset of data comprising at least a portion of weight data and at least a portion of input data for the CNN layer and performing, using the at least one convolution engine, a convolution of the second subset of data to generate a second partial result; and combining the first partial result and the second partial result to generate at least a portion of convolved data for a layer of the CNN.Type: ApplicationFiled: April 10, 2023Publication date: September 28, 2023Inventors: Clifford Gibson, James Imber
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Publication number: 20230195831Abstract: Methods and systems for performing a convolution transpose operation between an input tensor having a plurality of input elements and a filter comprising a plurality of filter weights. The method includes: dividing the filter into a plurality of sub-filters; performing, using hardware logic, a convolution operation between the input tensor and each of the plurality of sub-filters to generate a plurality of sub-output tensors, each sub-output tensor comprising a plurality of output elements; and interleaving, using hardware logic, the output elements of the plurality of sub-output tensors to form a final output tensor for the convolution transpose.Type: ApplicationFiled: January 12, 2023Publication date: June 22, 2023Inventors: Cagatay Dikici, Clifford Gibson, James Imber
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Patent number: 11625581Abstract: A method in a hardware implementation of a Convolutional Neural Network (CNN), includes receiving a first subset of data having at least a portion of weight data and at least a portion of input data for a CNN layer and performing, using at least one convolution engine, a convolution of the first subset of data to generate a first partial result; receiving a second subset of data comprising at least a portion of weight data and at least a portion of input data for the CNN layer and performing, using the at least one convolution engine, a convolution of the second subset of data to generate a second partial result; and combining the first partial result and the second partial result to generate at least a portion of convolved data for a layer of the CNN.Type: GrantFiled: May 3, 2017Date of Patent: April 11, 2023Assignee: Imagination Technologies LimitedInventors: Clifford Gibson, James Imber
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Patent number: 11556613Abstract: Methods and systems for performing a convolution transpose operation between an input tensor having a plurality of input elements and a filter comprising a plurality of filter weights. The method includes: dividing the filter into a plurality of sub-filters; performing, using hardware logic, a convolution operation between the input tensor and each of the plurality of sub-filters to generate a plurality of sub-output tensors, each sub-output tensor comprising a plurality of output elements; and interleaving, using hardware logic, the output elements of the plurality of sub-output tensors to form a final output tensor for the convolution transpose.Type: GrantFiled: March 20, 2020Date of Patent: January 17, 2023Assignee: Imagination Technologies LimitedInventors: Cagatay Dikici, Clifford Gibson, James Imber
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Publication number: 20220383067Abstract: A method for providing input data for a layer of a convolutional neural network “CNN”, the method comprising: receiving input data comprising input data values to be processed in a layer of the CNN; determining addresses in banked memory of a buffer in which the received data values are to be stored based upon format data indicating a format parameter of the input data in the layer and indicating a format parameter of a filter which is to be used to process the input data in the layer; and storing the received input data values at the determined addresses in the buffer for retrieval for processing in the layer.Type: ApplicationFiled: July 19, 2022Publication date: December 1, 2022Inventors: Daniel Barnard, Clifford Gibson, Colin McQuillan