Abstract: A method of manufacturing a silicon-on-insulator (SOI) substrate is provided. The method includes forming an island-shaped insulating layer on a first surface of a first semiconductor substrate in a first region, forming a silicon epitaxial layer on the first surface of the first semiconductor substrate so as to cover the island-shaped insulating layer, forming a trench by etching the silicon epitaxial layer so as to expose the island-shaped insulating layer, and forming a first insulating adhesive layer on the silicon epitaxial layer and the island-shaped insulating layer so as to fill the trench.

Abstract: A semiconductor device may include a first dielectric layer. The semiconductor device may further include a second dielectric layer overlapping the first dielectric layer and having a closed cavity structure. The semiconductor device may further include a first transistor disposed between the first dielectric layer and the closed cavity structure. The semiconductor device may further include a second transistor disposed between the first dielectric layer and the closed cavity structure. The semiconductor device may further include a trench isolation structure disposed between the first transistor and the second transistor and disposed between the first dielectric layer and the closed cavity structure.

Abstract: A semiconductor device may include a first dielectric layer. The semiconductor device may further include a second dielectric layer overlapping the first dielectric layer and having a closed cavity structure. The semiconductor device may further include a first transistor disposed between the first dielectric layer and the closed cavity structure. The semiconductor device may further include a second transistor disposed between the first dielectric layer and the closed cavity structure. The semiconductor device may further include a trench isolation structure disposed between the first transistor and the second transistor and disposed between the first dielectric layer and the closed cavity structure.

Abstract: A method of manufacturing a silicon-on-insulator (SOI) substrate is provided. The method includes forming an island-shaped insulating layer on a first surface of a first semiconductor substrate in a first region, forming a silicon epitaxial layer on the first surface of the first semiconductor substrate so as to cover the island-shaped insulating layer, forming a trench by etching the silicon epitaxial layer so as to expose the island-shaped insulating layer, and forming a first insulating adhesive layer on the silicon epitaxial layer and the island-shaped insulating layer so as to fill the trench.

Abstract: A CMOS image sensor includes a pinned photodiode and a transfer gate that are formed using a thick mask that is self-aligned to at least one edge of the polysilicon gate structure to facilitate both the formation of a deep implant and to provide proper alignment between the photodiode implant and the gate. In one embodiment a drain side implant is formed concurrently with the deep n-type implant of the photodiode. After the deep implant, the mask is removed and a shallow p+ implant is formed to complete the photodiode. In another embodiment, the polysilicon is etched to define only a drain side edge, a shallow drain side implant is performed, and then a thick mask is provided and used to complete the gate structure, and is retained during the subsequent high energy implant. Alternatively, the high energy implant is performed prior to the shallow drain side implant.

Abstract: An imager includes a two-dimensional array of photosensors, each photosensor having a center point. A non-telecentric lens is positioned over the two-dimensional array of photosensors, and a two-dimensional array of microlenses is positioned over the two-dimensional array of photosensors. Each microlens is associated with a corresponding photosensor, and each microlens has a center point. A color filter array is positioned over the two-dimensional array of photosensors. The color filter array includes a plurality of color filter areas. Each color filter area is associated with a corresponding photosensor and has a center point. A layer of transmissive apertures is further positioned over the two-dimensional array of photosensors. Each aperture is associated with a corresponding photosensor and having a center point. The microlens is positioned over the corresponding photosensor such that the center point of the microlens is offset from the center point of the corresponding photosensor.

Abstract: A semiconductor imager structure having a well region formed in a substrate layer. The well region being of a predetermined shape having a plurality of corners being non-right angles.

Abstract: A semiconductor structure, having a doped well region being formed in a substrate layer and a transistor having a terminal provided within said doped well region. The semiconductor structure also includes an oxide layer formed over the substrate layer, the doped well region, a poly silicon region, and the terminal of the transistor. The oxide layer including a step region being located where a height of the oxide layer transitions from a height associated with the doped well region to a height associated with the terminal of the transistor.

Abstract: A photodiode sensor structure includes a first dopant type substrate with a first surface and a second dopant type well region with a second surface. The second dopant type well region is formed in the first dopant type substrate such that the first surface and the second surface are substantially co-planar to form a diode surface. An interface between the second dopant type well region and the first dopant type substrate at the diode surface forms a diode junction. A poly silicon region is formed along the periphery of the entire diode junction. The poly silicon region provides the p-n junction of the photodiode with a physical shield to prevent any process damage from being introduced after the poly silicon processing (including damages from processes such as dielectric deposition/pattern, metal deposition/pattern, and/or via/contact hole etching), thereby reducing leakage current.

Abstract: A semiconductor imager structure having a photodiode being provided as a well region formed within a substrate layer and a transistor electrically connected to the photodiode and having a terminal that has a same electrical potential as the photodiode. The well region of the photodiode having an extended portion so that at least a portion of the terminal of the transistor has the same electrical potential as the photodiode is formed within the extended portion of the well region of the photodiode.

Abstract: A distance measuring device and photosensor circuit are disclosed herein. By pulsing a light source such as an LED to illuminate an object and measuring the phase difference between the light reflected from the object and the original phase of the light source, the distance to an object may be determined. In order to measure the phase difference, a CMOS photosensor or photosensor array may be used to receive the reflected light and store charge generated during different portions of time in different storage nodes or pixel cells. The difference between the amount of charge stored in different storage nodes can be used to determine the phase difference between the original light illuminating the object and the light reflected from the object. This phase difference can in turn be used to determine the distance to the object.

Abstract: An imager includes a two-dimensional array of photosensors, each photosensor having a center point. A non-telecentric lens is positioned over the two-dimensional array of photosensors, and a two-dimensional array of microlenses is positioned over the two-dimensional array of photosensors. Each microlens is associated with a corresponding photosensor, and each microlens has a center point. A color filter array is positioned over the two-dimensional array of photosensors. The color filter array includes a plurality of color filter areas. Each color filter area is associated with a corresponding photosensor and has a center point. A layer of transmissive apertures is further positioned over the two-dimensional array of photosensors. Each aperture is associated with a corresponding photosensor and having a center point. The microlens is positioned over the corresponding photosensor such that the center point of the microlens is offset from the center point of the corresponding photosensor.

Abstract: An extended dynamic range pixel cell providing blooming protection is disclosed herein. By applying a timed varying signal to a shunt transistor in order to shunt excess charge generated by a photosensor in response to high intensity illumination, blooming protection can be provided. In particular configurations, blooming protection is provided not only during an integration period but also during a readout period when the pixel cell is generally most susceptible to blooming problems. The time varying voltage is also used to extend the dynamic range of the pixel cell thereby increasing the pixel cells usefulness in high contrast conditions, such as bright sunlight casting deep shadows, nighttime automotive applications, and the like.

Abstract: A distance measuring device and photosensor circuit are disclosed herein. By pulsing a light source such as an LED to illuminate an object and measuring the phase difference between the light reflected from the object and the original phase of the light source, the distance to an object may be determined. In order to measure the phase difference, a CMOS photosensor or photosensor array may be used to receive the reflected light and store charge generated during different portions of time in different storage nodes or pixel cells. The difference between the amount of charge stored in different storage nodes can be used to determine the phase difference between the original light illuminating the object and the light reflected from the object. This phase difference can in turn be used to determine the distance to the object.

Abstract: An extended dynamic range pixel cell providing blooming protection is disclosed herein. By applying a timed varying signal to a shunt transistor in order to shunt excess charge generated by a photosensor in response to high intensity illumination, blooming protection can be provided. In particular configurations, blooming protection is provided not only during an integration period but also during a readout period when the pixel cell is generally most susceptible to blooming problems. The time varying voltage is also used to extend the dynamic range of the pixel cell thereby increasing the pixel cells usefulness in high contrast conditions, such as bright sunlight casting deep shadows, nighttime automotive applications, and the like.

Abstract: An imaging circuit (10) is formed on a semiconductor substrate (40) having first and second regions (41, 42) for capturing a light signal (LIGHT) to produce first and second charges, respectively. A conductive material (52, 53) is extended from the first region to the second region for controlling the first and second charges in response to a control signal (COL1, ROW1) to produce an output signal (VOUT) of the imaging circuit.

Abstract: An electronic component having an image sensing device (41, 71, 86, 132, 182, 212) and a method for improving pixel charge transfer in the image sensing device (41, 71, 86, 132, 182, 212). The image sensing device (41, 71, 86, 132, 182, 212) has a transfer gate (42, 82) between a source region (43, 83) and an image sensing region. The image sensing region is formed to have a wider device width proximate to the transfer gate (42, 82) than at a point distal from the transfer gate (42, 82).

Abstract: An image sensor (10) has an image sensing element that includes an N-type conducting region (26) and a P-type pinned layer (37). The two regions form two P-N junctions at different depths that increase the efficiency of charge carrier collection at different frequencies of light. The conducting region (26) is formed by an angle implant that ensures that a portion of the conducting region (26) can function as a source of a MOS transistor (32).

Abstract: An image sensor (10) has an image sensing element that includes an N-type conducting region (26) and a P-type pinned layer (37). The two regions form two P-N junctions at different depths that increase the efficiency of charge carrier collection at different frequencies of light. The conducting region (26) is formed by an angle implant that ensures that a portion of the conducting region (26) can function as a source of an MOS transistor (32).

Abstract: An image sensor (10) has an image sensing element that includes an N-type conducting region (26) and a P-type pinned layer (37). The two regions form two P-N junctions at different depths that increase the efficiency of charge carrier collection at different frequencies of light. The conducting region (26) is formed by an angle implant that ensures that a portion of the conducting region (26) can function as a source of an MOS transistor (32).