Abstract: A digital logic circuit for use with an incremental positioning encoder is presented. The circuit converts two quadrature pulse train signals, generated by an incremental position type encoder, to a counting CLOCK signal and an UP/DOWN count signal. The signals are transmitted on counters to generate counting clock signal and the UP/DOWN count position information. The circuit utilizes gate delays to detect the edge of a pulse train signal. No external clocks or comparators are nested. The design, by relying on the propagation delay of gates, keeps the circuit simple and more reliable.