Abstract: Methods and apparatus are described, in the context of an information handling system, that permit data chaining in a data streaming mode to be performed through a channel extender. The information handling system includes a processor channel and a peripheral device controller which communicate with one another over the channel extender. The invention allows the separation between the processor channel and peripheral device controller to be extended up to several (e.g. 1, 2 or 3) kilometers versus the less than 0.5 kilometer separation imposed by state of the art systems. Furthermore, the invention allows the objective of increased channel extender length to be accomplished without the risk of data overruns, chaining checks or peripheral device controller signalled errors which would otherwise occur as a result of requests for data or data transfers being in flight on an extended link.

Abstract: This embodiment provides apparatus and method for implementing a High Speed Link (HSL) such as the newly proposed ANSI High Performance Parallel Interface (HIPPI) standard on processors complexes like the IBM 3090 having a paging store with an independent bus. A high speed link adapter (HSLA) including input and output buffers and controls is coupled to the independent bus under program control. Program access to high speed link is obtained by an extension to the Page-in and Page-out instructions.