Patents by Inventor Clifton Lyons

Clifton Lyons has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9619598
    Abstract: Various implementations of the invention provide for the determination of a test set that satisfies a coverage model, where portions of the search space need not be searched in order to generate the test set. With various implementations of the invention, a search space defined by a set of inputs for an electronic design and a coverage model is identified. The search space is then fractured into subspaces. Subsequently, the subspaces are solved to determine if they include at least one input sequence that satisfies the coverage constraints defined in the coverage model. The subspaces found to include at least one input sequence that satisfies these coverage constraints, are then searched for unique input sequences in order to generate a test set. Subspaces found not to include at least one input sequence that satisfies the coverage constraints may be excluded from the overall search space.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: April 11, 2017
    Assignee: Mentor Graphics Corporation
    Inventors: Clifton A. Lyons, Jr., Sudhir D. Kadkade, Kunal P. Ganeshpure
  • Patent number: 9135376
    Abstract: Various embodiments provide for the determination of a test set that satisfies a coverage model, where portions of the search space need not be searched in order to generate the test set. With various embodiments, a search space defined by a set of inputs for an electronic design and a coverage model is identified. The search space is then fractured into subspaces. Subsequently, the subspaces are solved to determine if they include at least one input sequence that satisfies the coverage constraints defined in the coverage model. The subspaces found to include at least one input sequence that satisfies these coverage constraints, are then searched for unique input sequences in order to generate a test set. Subspaces found not to include at least one input sequence that satisfies the coverage constraints may be excluded from the overall search space.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: September 15, 2015
    Assignee: Mentor Graphics Corporation
    Inventors: Sudhir D. Kadkade, Clifton A. Lyons, Jr., Kunal P. Ganeshpure
  • Publication number: 20080059842
    Abstract: A method of implementing a traversal strategy as part of a dynamic verification can include initializing a non-deterministic automaton (NDA) traversal mechanism that has (1) a strategy push-down stack (strategy PDS) that holds traversal strategy pointers and (2) an object push-down stack (object PDS) that holds object pointers, pushing a traversal strategy object pointer onto the strategy PDS, wherein the traversal strategy object pointer points to a traversal strategy object, popping a current object pointer from the object PDS, and determining whether the current object pointer points to a terminal object.
    Type: Application
    Filed: October 26, 2007
    Publication date: March 6, 2008
    Inventors: Sudhir Kadkade, Clifton Lyons
  • Publication number: 20050081094
    Abstract: A method and apparatus for synchronizing a non-deterministic automaton being processed on a computing device during dynamic verification of a system or device under test, is described herein.
    Type: Application
    Filed: September 30, 2004
    Publication date: April 14, 2005
    Inventors: Sudhir Kadkade, Clifton Lyons
  • Publication number: 20050071720
    Abstract: A method and apparatus for manipulating a non-deterministic automaton and a traversal of a non-deterministic automaton for dynamic verification of a system or device under test is described herein.
    Type: Application
    Filed: September 30, 2004
    Publication date: March 31, 2005
    Inventors: Sudhir Dattaram Kadkade, Clifton Lyons