Patents by Inventor Clifton Williamson

Clifton Williamson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9135999
    Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well as the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: September 15, 2015
    Assignee: Seagate Technology LLC
    Inventors: Harley F. Burger, Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Patent number: 9058879
    Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well as the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: June 16, 2015
    Assignee: Seagate Technology LLC
    Inventors: Harley F. Burger, Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Patent number: 9007828
    Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well as the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: April 14, 2015
    Assignee: LSI Corporation
    Inventors: Harley F. Burger, Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Patent number: 8892966
    Abstract: Methods and apparatus for soft data generation for memory devices using decoder performance feedback. At least one soft data value is generated in a memory device, by obtaining performance feedback from a decoder; obtaining an error statistic based on the performance feedback; and generating the at least one soft data value based on the obtained error statistic. The performance feedback comprises one or more of decoded bits, a number of erroneous bits based on data decoded by the decoder and a number of unsatisfied parity checks.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: November 18, 2014
    Assignee: LSI Corporation
    Inventors: Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Nenad Miladinovic, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Patent number: 8830748
    Abstract: Methods and apparatus are provided for soft data generation for memory devices. At least one soft data value is generated for a memory device, by obtaining at least one hard read value; and generating the soft data value associated with the at least one hard read value based on statistics for reading the hard read value. The hard read value may be one or more of data bits, voltage levels, current levels and resistance levels. The generated soft data value may be one or more of (i) a soft read value that is used to generate one or more log likelihood ratios, and (ii) one or more log likelihood ratios. The statistics comprise one or more of bit-based statistics and cell-based statistics. The statistics may also optionally comprise pattern-dependent disturbance of at least one aggressor cell on the target cell, as well as location-specific statistics.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: September 9, 2014
    Assignee: LSI Corporation
    Inventors: Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Nenad Miladinovic, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Patent number: 8724381
    Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: May 13, 2014
    Assignee: Agere Systems LLC
    Inventors: Harley F. Burger, Jr., Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Publication number: 20140126288
    Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well as the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 8, 2014
    Applicant: Agere Systems LLC
    Inventors: Harley F. Burger, Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Publication number: 20140126289
    Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well as the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 8, 2014
    Applicant: Agere Systems LLC
    Inventors: Harley F. Burger, Erich F. Haratsch, Milos Ivkovich, Victor Krachkovsky, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Publication number: 20140126287
    Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well as the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 8, 2014
    Applicant: Agere Systems LLC
    Inventors: Harley F. Burger, Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Publication number: 20110305082
    Abstract: Methods and apparatus are provided for soft data generation for memory devices. At least one soft data value is generated for a memory device, by obtaining at least one hard read value; and generating the soft data value associated with the at least one hard read value based on statistics for reading the hard read value. The hard read value may be one or more of data bits, voltage levels, current levels and resistance levels. The generated soft data value may be one or more of (i) a soft read value that is used to generate one or more log likelihood ratios, and (ii) one or more log likelihood ratios. The statistics comprise one or more of bit-based statistics and cell-based statistics. The statistics may also optionally comprise pattern-dependent disturbance of at least one aggressor cell on the target cell, as well as location-specific statistics.
    Type: Application
    Filed: September 30, 2009
    Publication date: December 15, 2011
    Inventors: Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Nenad Miladinovic, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Publication number: 20110239089
    Abstract: Methods and apparatus for soft data generation for memory devices using decoder performance feedback. At least one soft data value is generated in a memory device, by obtaining performance feedback from a decoder; obtaining an error statistic based on the performance feedback; and generating the at least one soft data value based on the obtained error statistic. The performance feedback comprises one or more of decoded bits, a number of erroneous bits based on data decoded by the decoder and a number of unsatisfied parity checks.
    Type: Application
    Filed: September 30, 2009
    Publication date: September 29, 2011
    Inventors: Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Nenad Miladinovic, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Publication number: 20110090734
    Abstract: Methods and apparatus are provided for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding. A single sector can be stored across a plurality of pages in the flash memory device. Per-page control is provided of the number of sectors in each page, as well the code and/or code rate used for encoding and decoding a given page, and the decoder or decoding algorithm used for decoding a given page. Multi-page and wordline level access schemes are also provided.
    Type: Application
    Filed: March 11, 2009
    Publication date: April 21, 2011
    Inventors: Harley F. Burger, JR., Erich F. Haratsch, Milos Ivkovic, Victor Krachkovsky, Andrei Vityaev, Clifton Williamson, Johnson Yen
  • Patent number: 7516394
    Abstract: Methods and apparatus are provided for a combined encoder/syndrome computer with a programmable parity level. In one embodiment, a circuit is disclosed that generates check symbols during an encoding operation and generates error syndromes during a decoding operation. The circuit comprises a plurality of subfilters grouped into a multiple degree polynomial filter, where the number of multiple degree subfilters is less than a maximum number of symbols of redundancy.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: April 7, 2009
    Assignee: Agere Systems Inc.
    Inventors: Jonathan James Ashley, Clifton Williamson
  • Publication number: 20060212783
    Abstract: Methods and apparatus are provided for a combined encoder/syndrome computer with a programmable parity level. In one embodiment, a circuit is disclosed that generates check symbols during an encoding operation and generates error syndromes during a decoding operation. The circuit comprises a plurality of subfilters grouped into a multiple degree polynomial filter, where the number of multiple degree subfilters is less than a maximum number of symbols of redundancy.
    Type: Application
    Filed: March 14, 2005
    Publication date: September 21, 2006
    Inventors: Jonathan Ashley, Clifton Williamson