Abstract: In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.

Abstract: In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. in some embodiments, an RE circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.

Abstract: In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.

Abstract: In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.

Abstract: In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.

Abstract: An antenna tuning circuit achieves robust performance in a closed loop antenna tuning system due to the addition of protection circuits. In one instance, a protection circuit to detect an overload condition based on a threshold value may be included in the antenna tuning circuit. The antenna tuning circuit also includes a protection state register coupled to the protection circuit to store one or more safe states of operation to which the circuit is restored in response to detecting the overload condition. The antenna tuning circuit also includes a bus interface coupled to the protection state register to transmit an indication of a state of operation of the circuit to an external tuning control device coupled to the circuit and to receive pre-defined protection actions from the external tuning control device in response to the indication of the state of operation.

Abstract: In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.

Abstract: In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.

Abstract: In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.

Abstract: In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.

Abstract: In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.

Abstract: A charge pump regulator circuit includes an oscillator and one or more charge pumps. One or more oscillating signals are generated by the oscillator. Each oscillating signal has a peak-to-peak amplitude that is variable dependent on a variable drive signal. For some embodiments having multiple oscillating signals, each oscillating signal is phase shifted from a preceding oscillating signal. For some embodiments having multiple charge pumps, each charge pump is connected to receive a corresponding one of the oscillating signals. Each charge pump outputs a voltage and current. For some embodiments having multiple charge pumps, the output of each charge pump is phase shifted from the outputs of other charge pumps. A combination of the currents thus produced is provided at about a voltage level to a load.

Abstract: A charge pump regulator circuit includes an oscillator and one or more charge pumps. One or more oscillating signals are generated by the oscillator. Each oscillating signal has a peak-to-peak amplitude that is variable dependent on a variable drive signal. For some embodiments having multiple oscillating signals, each oscillating signal is phase shifted from a preceding oscillating signal. For some embodiments having multiple charge pumps, each charge pump is connected to receive a corresponding one of the oscillating signals. Each charge pump outputs a voltage and current. For some embodiments having multiple charge pumps, the output of each charge pump is phase shifted from the outputs of other charge pumps. A combination of the currents thus produced is provided at about a voltage level to a load.

Abstract: A charge pump regulator circuit includes an oscillator and one or more charge pumps. One or more oscillating signals are generated by the oscillator. Each oscillating signal has a frequency or amplitude or both that are variable dependent on a variable drive signal. For some embodiments having multiple oscillating signals, each oscillating signal is phase shifted from a preceding oscillating signal. For some embodiments having multiple charge pumps, each charge pump is connected to receive a corresponding one of the oscillating signals. Each charge pump outputs a voltage and current. For some embodiments having multiple charge pumps, the output of each charge pump is phase shifted from the outputs of other charge pumps. A combination of the currents thus produced is provided at about a voltage level to a load.

Abstract: A charge pump regulator circuit includes a voltage controlled oscillator and a plurality of charge pumps. The voltage controlled oscillator has a plurality of inverter stages connected in series in a ring. A plurality of oscillating signals is generated from outputs of the inverter stages. Each oscillating signal has a frequency or amplitude or both that are variable dependent on a variable drive voltage. Each oscillating signal is phase shifted from a preceding oscillating signal. Each charge pump is connected to a corresponding one of the inverter stages to receive the oscillating signal produced by that inverter stage. Each charge pump outputs a voltage and current. The output of each charge pump is phase shifted from the outputs of other charge pumps. A combination of the currents thus produced is provided at about a voltage level to the load.

Abstract: A charge pump regulator circuit includes a voltage controlled oscillator and a plurality of charge pumps. The voltage controlled oscillator has a plurality of inverter stages connected in series in a ring. A plurality of oscillating signals is generated from outputs of the inverter stages. Each oscillating signal has a frequency or amplitude or both that are variable dependent on a variable drive voltage. Each oscillating signal is phase shifted from a preceding oscillating signal. Each charge pump is connected to a corresponding one of the inverter stages to receive the oscillating signal produced by that inverter stage. Each charge pump outputs a voltage and current. The output of each charge pump is phase shifted from the outputs of other charge pumps. A combination of the currents thus produced is provided at about a voltage level to the load.

Abstract: A charge pump regulator circuit includes an oscillator and one or more charge pumps. One or more oscillating signals are generated by the oscillator. Each oscillating signal has a frequency or amplitude or both that are variable dependent on a variable drive signal. For some embodiments having multiple oscillating signals, each oscillating signal is phase shifted from a preceding oscillating signal. For some embodiments having multiple charge pumps, each charge pump is connected to receive a corresponding one of the oscillating signals. Each charge pump outputs a voltage and current. For some embodiments having multiple charge pumps, the output of each charge pump is phase shifted from the outputs of other charge pumps. A combination of the currents thus produced is provided at about a voltage level to a load.

Abstract: A charge pump regulator circuit includes a voltage controlled oscillator and a plurality of charge pumps. The voltage controlled oscillator has a plurality of inverter stages connected in series in a ring. A plurality of oscillating signals is generated from outputs of the inverter stages. Each oscillating signal has a frequency or amplitude or both that are variable dependent on a variable drive voltage. Each oscillating signal is phase shifted from a preceding oscillating signal. Each charge pump is connected to a corresponding one of the inverter stages to receive the oscillating signal produced by that inverter stage. Each charge pump outputs a voltage and current. The output of each charge pump is phase shifted from the outputs of other charge pumps. A combination of the currents thus produced is provided at about a voltage level to the load.

Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.

Abstract: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.