Patents by Inventor Clive HENDRICKS

Clive HENDRICKS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11735535
    Abstract: Embodiments include an inductor, a method to form the inductor, and a semiconductor package. An inductor includes a plurality of plated-through-hole (PTH) vias in a substrate layer, and a plurality of magnetic interconnects with a plurality of openings in the substrate layer. The openings of the magnetic interconnects surround the PTH vias. The inductor also includes an insulating layer in the substrate layer, a first conductive layer over the PTH vias, magnetic interconnects, and insulating layer, and a second conductive layer below the PTH vias, magnetic interconnects, and insulating layer. The insulating layer surrounds the PTH vias and magnetic interconnects. The magnetic interconnects may have a thickness substantially equal to a thickness of the PTH vias. The magnetic interconnects may be shaped as hollow cylindrical magnetic cores with magnetic materials. The magnetic materials may include ferroelectric, conductive, or epoxy materials. The hollow cylindrical magnetic cores may be ferroelectric cores.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: August 22, 2023
    Assignee: Intel Corporation
    Inventors: Kaladhar Radhakrishnan, Krishna Bharath, Clive Hendricks
  • Publication number: 20210104475
    Abstract: Embodiments include an inductor, a method to form the inductor, and a semiconductor package. An inductor includes a plurality of plated-through-hole (PTH) vias in a substrate layer, and a plurality of magnetic interconnects with a plurality of openings in the substrate layer. The openings of the magnetic interconnects surround the PTH vias. The inductor also includes an insulating layer in the substrate layer, a first conductive layer over the PTH vias, magnetic interconnects, and insulating layer, and a second conductive layer below the PTH vias, magnetic interconnects, and insulating layer. The insulating layer surrounds the PTH vias and magnetic interconnects. The magnetic interconnects may have a thickness substantially equal to a thickness of the PTH vias. The magnetic interconnects may be shaped as hollow cylindrical magnetic cores with magnetic materials. The magnetic materials may include ferroelectric, conductive, or epoxy materials. The hollow cylindrical magnetic cores may be ferroelectric cores.
    Type: Application
    Filed: October 8, 2019
    Publication date: April 8, 2021
    Inventors: Kaladhar RADHAKRISHNAN, Krishna BHARATH, Clive HENDRICKS